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Issue No.10 - October (1968 vol.17)
pp: 1004
W.A. Farrand , Autonetics
ABSTRACT
This paper describes an all-parallel DDA with electronic patchboard, high iteration rate (one million complete computation cycles per second), and reasonable word length (20 bits), built by Teledyne. It further describes the hybrid LSI packaging used (MEMA hybrid multichip flatpack), computer-aided methods of programming, and automatic methods of documenting the resultant coding.
INDEX TERMS
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CITATION
W.A. Farrand, "R68-45 Electrically Alterable Digital Differential Analyzer", IEEE Transactions on Computers, vol.17, no. 10, pp. 1004, October 1968, doi:10.1109/TC.1968.226454
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