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Logic Hazards in Threshold Networks
March 1968 (vol. 17 no. 3)
pp. 238-251
Abstract?This paper is concerned with the study of logic hazards in threshold gate networks. Eichelberger has proved that logic hazards are not present in a sum-of-product (product-of-sum) realization which realizes all of the 1(0) prime implicants of the given Boolean function.[2]Logic gates of the AND or NOR (OR or NAND) variety realize single l(0) prime implicants; therefore, a gate is required for each 1(0) prime implicant to be realized, and the problem of eliminating logic hazards is straightforward.
Index Terms:
Index terms?Combinational logic, logic hazards, static hazards, threshold networks.
Citation:
A.B. Howe, C.L. Coates, "Logic Hazards in Threshold Networks," IEEE Transactions on Computers, vol. 17, no. 3, pp. 238-251, March 1968, doi:10.1109/TC.1968.229097
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