• Design-for-Test Engineers: Due to the increasing cost of production tests for multimedia/telecom circuits, it is mandatory that test engineers have a full knowledge of up-to-date high-tech Automatic Test Equipment.
• Test Engineers: The major role played by time-to-market in the economical strategy of circuit manufacturers implies that the time needed for test development has become of critical importance. Thus, it is now mandatory for test program engineers to have a good knowledge of characterization and production test in addition to their traditional software skills.
• Product Engineers: By definition, product engineers must have adequate knowledge in both circuit design and circuit testing.
• Design Engineers: In the context of a modern Design-for-Test approach, design engineers are nowadays required to be aware of testing issues and to have notions of engineering testing implementation.
• The levels: Signals are applied to the device under test (DUT) using the D, which converts logic "0" and "1" into real voltages. In return, signals coming from the DUT are converted into logic states by the C based on programmable detection thresholds. In addition, current load can be applied to the DUT using the parametric load (PL).
• The timings: Driver and comparator events are first defined as with no timing information and stored in the . The timing generator then locates each event in time. This separation allows using the same set of waveforms with different timings.
• The vectors: The vector memory contains a column of pointers to the wavetable, and so determines the sequence of signal to be applied to the DUT by calling waveforms one after one, for each tester period.
• B. Pradarelli is with the Support Technique et Pédagogique du CRTC, Pole CNFM de Montpellier, 161 rue Ada, 34392 Montpellier, France.
• L. Latorre is with the National Test Resource Center, Pole CNFM de Montpellier/LIRMM/University Montpellier II, 161 rue Ada, 34392 Montpellier, France. E-mail: email@example.com.
• M.-L. Flottes is with CNRS/LIRMM, 161 rue Ada, 34392 Montpellier, France. E-mail: firstname.lastname@example.org.
• Y. Bertrand is with the Science Faculty, University Montpellier II/LIRMM, 161 rue Ada, 34392 Montpellier, France.
• P. Nouet is with the Pole CNFM de Montpellier/LIRMM/University Montpellier II, 161 rue Ada, 34392 Montpellier, France.
Manuscript received 31 Mar. 2009; revised 18 June 2009; accepted 6 Oct. 2009; published online 23 Oct. 2009.
For information on obtaining reprints of this article, please send e-mail to: email@example.com, and reference IEEECS Log Number TLTSI-2009-03-0048.
Digital Object Identifier no. 10.1109/TLT.2009.46.
Béatrice Pradarelli received the PhD degree in microelectronics from the University of Montpellier, France, in 1996. For 10 years, she worked for semiconductors companies (VLSI Technologies and Philips SC) at different positions: test and product engineer, test leader, and test strategy leader. As a CRTC technical and academic support leader since 2006, she has organized local test trainings on digital, mixed-signal, and memory topics, and provides hotline support to distant ones. In 2008, she was certified by Verigy to train industry people.
Laurent Latorre received a diploma in mechanical engineering from the Ecole Nationale d'Ingénieur de Belfort in 1994, the MS degree in microelectronics from the University of Montpellier in 1995, and the PhD degree in the field of microsystems from LIRMM Laboratory in 1999. After a period as a postdoctoral researcher at the University of California, Los Angeles (UCLA), he obtained an associate professor position at the University of Montpellier in 2001. He has been the head of the CNFM Test Resource Center since 2004. His current research interests include the design and test of CMOS Microsystems.
Marie-Lise Flottes received the PhD degree in electrical engineering from the University of Montpellier in 1990. She is currently a researcher at the National Scientific Research Center in France (CNRS). Since 1990, she has been conducting research in the domain of digital system testing at LIRMM laboratory, France. Her research interests include the design for testability, testability and dependability of secure circuits, and test data compression and test management for integrated systems SoC and SiP. She is a member of the IEEE Computer Society.
Yves Bertrand is a professor of electronics at the University of Montpellier. He develops its research activity in the LIRMM laboratory in the field of integrated circuits and system testing with a special interest in medical devices. He created and directed CRTC from 1997 to 2004. Since then, he has been the head of the science faculty at the University of Montpellier II.
Pascal Nouet received the PhD degree in microelectronics from the University of Montpellier II, France, in 1991. He is currently a full professor in the Electronics Engineering Department at the University of Montpellier II. He is mentoring or has mentored a total of 19 PhD students and has been the author or coauthor of numerous papers and several patents. Among them, 110 appeared in journals or have been presented in major international conferences. From 1987, he has been involved in various research projects such as Electron-Beam Testing of ICs, effect of irradiations on CMOS circuits, characterization and modeling of CMOS devices and interconnects, and electrostatic discharges in VLSI circuits. His current research interests include the design, test, and reliability of integrated systems including a large variety of heterogeneous systems (MEMS and NEMS). Since 2006, he has also headed the regional CNFM center of Montpellier and the national resource centers of CNFM. He has served as a reviewer of several IEEE journals, and as a referee for public-funded projects in France. He is a member of the IEEE.