A strong physically unclonable function (PUF) is a circuit structure that extracts an exponential number of unique chip signatures from a bounded number of circuit components. The strong PUF unique signatures can enable a variety of lowoverhead security and intellectual property protection protocols applicable to several computing platforms. This paper proposes a novel lightweight (low overhead) strong PUF based on the timings of a classic processor architecture. A small amount of circuitry is added to the processor for on-the-fly extraction of the unique timing signatures. To achieve desirable strong PUF properties, we develop an algorithm which leverages intentional post-silicon aging to tune the inter-chip and intra-chip signature variation. Our evaluation results show that the new PUF meets the desirable inter- and intra-chip strong PUF characteristics, while its overhead is much lower than the existing strong PUFs. For the processors implemented in 45nm technology, the average interchip Hamming distance for 32-bit responses is increased by 16.1% after applying our post-silicon tuning method; the aging algorithm also decreases the average intra-chip Hamming distance by 98.1% (for 32-bit responses).
Delays, Aging, Logic gates, Adders, Security, Registers, Microprocessors, Negative bias temperature instability, Physically unclonable function, Multi-core processor, Secure computing platform, Post-silicon tuning, Circuit aging
Farinaz Koushanfar, "Processor-Based Strong Physical Unclonable Functions with Aging-Based Response Tuning", IEEE Transactions on Emerging Topics in Computing, , no. 1, pp. 1, PrePrints PrePrints, doi:10.1109/TETC.2013.2289385