• W
  • WVLSI
  • 2000
  • IEEE Computer Society Annual Workshop on VLSI (WVLSI'00)
Advanced Search 
IEEE Computer Society Annual Workshop on VLSI (WVLSI'00)
Orlando, Florida
April 27-April 28
ISBN: 0-7695-0534-1
Table of Contents
System Level Design Methods and Examples I
J. Rabaey, University of California at Berkeley
J. Ammer, University of California at Berkeley
J.L. da Silva Jr., University of California at Berkeley
D. Patel, University of California at Berkeley
pp. 9
System Level Design Methods and Examples II
G. Nicolescu, TIMA Laboratory
P. Coste, TIMA Laboratory
F. Hessel, TIMA Laboratory
P. LeMarrec, TIMA Laboratory
A.A. Jerraya, TIMA Laboratory
pp. 29
Low Power Design
A. Parikh, Pennsylvania State University
M. Kandemir, Pennsylvania State University
N. Vijaykrishnan, Pennsylvania State University
M.J. Irwin, Pennsylvania State University
pp. 37
Rex Min, Massachusetts Institute of Technology
Travis Furrer, Massachusetts Institute of Technology
Anantha Chandrakasan, Massachusetts Institute of Technology
pp. 43
Andrés D. Garcia G, Ecole Nationale Sup?rieure des T?l?communications
Jean Luc Danger, Ecole Nationale Sup?rieure des T?l?communications
Wayne P. Burleson, University of Massachusetts at Amherst
pp. 47
H.S. Kim, Pennsylvania State University
V. Narayanan, Pennsylvania State University
M. Kandemir, Pennsylvania State University
M.J. Irwin, Pennsylvania State University
pp. 53
System Level Design Examples
Wael Badawy, University of Louisiana at Lafayette
Magdy Bayoumi, University of Louisiana at Lafayette
pp. 67
Timing Issues in System Design
Nihar R. Mahapatra, State University of New York at Buffalo
Alwin Tareen, State University of New York at Buffalo
Sriram V. Garimella, Seagate Technology, Inc.
pp. 81
Software System Design and Design Environment
Wolfgang Bossung, Darmstadt University of Technology
Thomas Geyer, Darmstadt University of Technology
Sorin Alexander Huss, Darmstadt University of Technology
Lars Wehmeyer, Darmstadt University of Technology
pp. 89
Ioannis Poulakis, National Technical University of Athens
George Economakos, National Technical University of Athens
Panayiotis Tsanakas, National Technical University of Athens
pp. 97
Analysis and Synthesis of Asynchronous Circuits
Advances in Multiplier Design
Issues in System Design
Usage of this product signifies your acceptance of the Terms of Use.