|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
 Digg  Furl  Spurl  Blink  Simpy  Google  Del.icio.us  Y!MyWeb | ||
| Search | ||
| ||
24th IEEE VLSI Test Symposium
Robust Test Generation for Precise Crosstalk-induced Path Delay Faults
Berkeley, California
April 30-May 04
ISBN: 0-7695-2514-8
| ASCII Text | x | ||
| Huawei Li, Peifu Shen, Xiaowei Li, "Robust Test Generation for Precise Crosstalk-induced Path Delay Faults," VLSI Test Symposium, IEEE, pp. 300-305, 24th IEEE VLSI Test Symposium, 2006. | |||
| BibTex | x | ||
| @article{ 10.1109/VTS.2006.60, author = {Huawei Li and Peifu Shen and Xiaowei Li}, title = {Robust Test Generation for Precise Crosstalk-induced Path Delay Faults}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2006}, isbn = {0-7695-2514-8}, pages = {300-305}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2006.60}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI Test Symposium, IEEE TI - Robust Test Generation for Precise Crosstalk-induced Path Delay Faults SN - 0-7695-2514-8 SP300 EP305 A1 - Huawei Li, A1 - Peifu Shen, A1 - Xiaowei Li, PY - 2006 KW - null VL - 0 JA - VLSI Test Symposium, IEEE ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2006.60
Crosstalk-induced delay should be tested for highspeed circuits. We propose a robust test generation technique based on a single precise crosstalk-induced path delay fault model, S-PCPDF model. The path sensitization criterion of robust test generation for a target S-PCPDF is defined separately for sensitizing the path under test and sensitizing the sub-path to propagate aggressor transitions. Experimental results showed that the proposed technique can be applied to circuits of reasonable sizes within an acceptable time. The average test efficiency is high.
Citation:
Huawei Li, Peifu Shen, Xiaowei Li, "Robust Test Generation for Precise Crosstalk-induced Path Delay Faults," vts, pp.300-305, 24th IEEE VLSI Test Symposium, 2006
Usage of this product signifies your acceptance of the Terms of Use.