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Proceedings 20th IEEE VLSI Test Symposium (VTS 2002) (2002)
Monterey, CA, USA
April 28, 2002 to May 2, 2002
ISBN: 0-7695-1570-3
TABLE OF CONTENTS
Foreword (PDF)
pp. xvi
pp. xviii
pp. xxii
pp. xxiii
Reviewers (PDF)
pp. xxiv
Welcome Message: Joan Figueras, General Chair
Michael Hackworth , Cirrus Logic, Inc.
pp. xxxv
Program Introduction: Andre Ivanov, Program Chair
Session 1: Microprocessor Test: Moderators: M. d'Abreau, Ample Communications
Nandu Tendolkar , Motorola, Inc.
Rajesh Raina , Motorola, Inc.
Rick Woltenberg , Motorola, Inc.
Xijiang Lin , Mentor Graphics Corporation
Bruce Swanson , Mentor Graphics Corporation
Greg Aldrich , Mentor Graphics Corporation
pp. 0003
Amit R. Pandey , University of Illinois at Urbana-Champaign
Tanak H. Patel , University of Illinois at Urbana-Champaign
pp. 0009
Session 2: Applications of Very Low Voltage and Slow Speed Testing: Moderators: K. Eshraghian, Edith Cowan University
Eric MacDonald , IBM Microelectronics Division
Nur A. Touba , University of Texas at Austin
pp. 0025
Wanli Jiang , Guidant Corporation
Eric Peterson , Guidant Corporation
pp. 0031
Chao-Wen Tseng , Stanford University
James Li , Stanford University
Edward J. McCluskey , Stanford University
pp. 0037
IP Session 1: Innovations in Test Automation
Jim Sproch , Synopsys Inc.
Michael Howells , Logic Vision Inc.
Janusz Rajski , Mentor Graphics Corp.
pp. 0043
Session 3: Advancements in Scan-Based Testing: Moderators: M. Lousberg, Philips
M. Goessel , University of Potsdam
E. Sogomonyan , University of Potsdam
A. Singh , Auburn University
pp. 0047
Aiman El-Maleh , King Fahd University of Petroleum and Minerals
Ali Al-Suwaiyan , King Fahd University of Petroleum and Minerals
pp. 0053
Session 4: Burn-in Reduction or Alternatives: Moderators: K. Mandl, Teradyne
Thomas S. Barnett , Auburn University
Adit D. Singh , Auburn University
Matt Grady , IBM Microelectronics
Kathleen Purdy , IBM Microelectronics
pp. 0075
IP Session 2: DFT Testers 1
Session 5: Test Set Compression Techniques: Moderators: K. Butler, Texas Instruments
Anshuman Chandra , Duke University
Krishnendu Chakrabarty , Duke University
Rafael A. Medina , Massachusetts Institute of Technology
pp. 0091
Ajay Khoche , Agilent Technologies, Inc.
Erik Volkerink , Agilent Technologies, Inc.
Jochen Rivoir , Agilent Technologies, Inc.
Subhasish Mitra , Intel Corporation
pp. 0097
Sudhakar M. Reddy , University of Iowa
Kohei Miyase , Kyushu Institute of Technology
Seiji Kajihara , Kyushu Institute of Technology
Irith Pomeranz , Purdue University
pp. 0103
Session 6: Analog BIST: Moderators: J. da Franca, ChipIdea
Ganapathy Kasturirangan , Intel Corporation
Michael S. Hsiao , Virginia Tech
pp. 0111
Hung-kai Chen , Nation Central University
Chih-hu Wang , Nation Central University
Chau-chin Su , Nation Central University
pp. 0117
Chee-Kian Ong , University of California at Santa Barbara
Kwang-Ting (Tim) Cheng , University of California at Santa Barbara
pp. 0123
IP Session 3: DFT Testers 2
Session 7: Increased Efficiency Testing: Moderators: B. Pouya, Banderacom
Mehrdad Nourani , University of Texas at Dallas
James Chin , Texas Instruments,Inc.
pp. 0133
Madhu K. Iyer , University of California at Santa Barbara
Kwang-Ting Cheng , University of California at Santa Barbara
pp. 0139
R. David , Laboratoire d ?Automatique de Grenoble
P. Girard , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
C. Landrault , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
S. Pravossoudovitch , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
A. Virazel , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
pp. 0145
Session 8: Controlling and Reducing Test Power: Moderators: A. Crouch, Inovys
Ranganathan Sankaralingam , University of Texas at Austin
Nur A. Touba , University of Texas at Austin
pp. 0153
Seiji Kajihara , Kyushu Institute of Technology
Koji Ishida , Kyushu Institute of Technology
Kohei Miyase , Kyushu Institute of Technology
pp. 0160
Ozgur Sinanoglu , University of California at San Diego
Ismet Bayraktaroglu , University of California at San Diego
Alex Orailoglu , University of California at San Diego
pp. 0166
IP Session 4
Robert Aitken , Agilent Technologies
Mustapha Slamani , IBM Microelectronics
H. Ding , IBM Microelectronics
William R. Eisenstadt , University of Florida
Sanghoon Choi , University of Florida
John McLaughlin , Agilent Technologies
pp. 0173
Special Session 1: Panel
William De Wilkins , National Semiconductor
Barry Baril , Credence
Sassan Tabatabaei , Vector 12
Fidel Muradali , Agilent Technologies
Ken Posse , Teseda
Lee Song , Teradyne
pp. 0175
Special Session 2: Panel
Julie Segal , HPL Technology
Rene Segers , Philips
R. Aitke , Agilent Technologies
S. Eichenberge , Philips
M. Millegen , HPL Technology
R. Seger , Philips
pp. 0177
Session 9: Diagnosis: Moderators: F. Maamari, LogicVision
James C.-M. Li , Stanford University
E. J. McCluskey , Stanford University
pp. 0187
Shi-Yu Huang , National Tsing-Hua University
pp. 0193
Session 10: Analog Circuit Testing: Moderators: J. Abraham, University of Texas at Austin
Jose Vicente Calvano , Brazilian Navy Research Institute
Vladimir Castro Alves , Federal University of Rio de Janeiro
Antonio C. Mesquita , Federal University of Rio de Janeiro
Marcelo Lubaszewski , Federal University of Rio Grande do Su
pp. 0201
Takahiro J. Yamaguchi , Advantest Laboratories, Ltd.
Masahiro Ishida , Advantest Laboratories, Ltd.
Mani Soma , University of Washington
Louis Malarsie , Agere Systems
Hirobumi Musha , Advantest Corporation
pp. 0207
Sule Ozev , University of California at San Diego
Alex Orailoglu , University of California at San Diego
pp. 0213
Session 11: High Level Test Techniques: Moderators: J. Aylor, Virginia Tech
N. Kranitis , University of Athens
A. Paschalis , University of Athens
D. Gizopoulos , University of Piraeus
Y. Zorian , LogicVision
pp. 0223
Luis Berrojo , Alcatel Espacio, S.A.
Isabel González , Alcatel Espacio, S.A.
Fulvio Corno , Politecnico di Torino
Matteo Sonza-Reorda , Politecnico di Torino
Giovanni Squillero , Politecnico di Torino
Luis Entrena , Universitad Carlos III
Celia Lopez , Universitad Carlos III
pp. 0229
Vivekananda M. Vedula , University of Texas at Austin
Jacob A. Abraham , University of Texas at Austin
Jayanta Bhadra , Motorola Inc.
pp. 0237
Session 12: SoC Test Infrastructure: Moderators: M. Mowji, LogicVision
Subhasish Mitra , Intel Corporation
Edward J. McCluskey , Stanford University
Samy Makar , Transmeta Corporation
pp. 0247
Vikram Iyengar , Duke University
Krishnendu Chakrabarty , Duke University
Erik Jan Marinissen , Philips Research Laboratories
pp. 0253
Sandeep Kumar Goel , Philips Research Laboratories
Erik Jan Marinissen , Philips Research Laboratories
pp. 0259
IP Session 5: Multi-GigaHertz Testing Challenges and Solutions
Karim Arabi , PMC Sierra
Klaus-Dieter Hilliges , Agilent Technologies
David Keezer , Georgia Institute of Technology
Sassan Tabatabaei , Vector 12
pp. 0265
Session 13: Test Tools and Algorithms: Moderators: T. Williams, Synopsys
Kumar N. Dwarakanat , Carnegie Mellon University
R. D. (Shawn) Blanton , Carnegie Mellon University
pp. 0269
Kuo-Liang Cheng , National Tsing Hua University
Jen-Chieh Yeh , National Tsing Hua University
Chih-Wea Wang , National Tsing Hua University
Chih-Tsun Huang , National Tsing Hua University
Cheng-Wen Wu , National Tsing Hua University
pp. 0281
Session 14: Supply Current Testing: Moderators: T. Storey, PDF
Yukio Okuda , Sony Corporation
pp. 0289
C. Thibeault , ?cole de Technologie Sup?rieure
pp. 0295
Special Session 3: Panel
Edward J. McCluske , Stanford University
Subhasish Mitra , Agilent Technologies
Bob Madge , LSI Logic
Peter Maxwell , Agilent Technologies
Phil Nigh , IBM
Mike Rodgers , Intel Corporation
pp. 0311
Special Session 4: Hot Topic
Beyond CMOS (PDF)
B. Courtoi , TIMA
M. Forshaw , University College, London
pp. 0315
Special Session 5: Embedded Tutorial
Session 15: Test Pattern Generation: Moderators: J. Hayes, University of Michigan
Satoshi Ohtake , Nara Institute of Science and Technology
Hideo Fujiwara , Nara Institute of Science and Technology
Shunjiro Miwa , NEC Corporation
pp. 0321
Toshinori Hosokawa , Semiconductor Technology Academic Research Center
Hiroshi Date , Semiconductor Technology Academic Research Center
Michiaki Muraoka , Semiconductor Technology Academic Research Center
pp. 0328
Amir Attarha , LSI Logic, Corporation
Mehrdad Nourani , University of Texas at Dallas
pp. 0336
Session 16: Tester Hardware Modeling and Improvements: Moderators: M. Topsakal, Cypress
Rodger Schuttert , Philips Research
Frans de Jong , Philips Research
Ben Kup , Philips Consumer Electronics
pp. 0345
Achintya Halder , Georgia Institute of Technology
Abhijit Chatterjee , Georgia Institute of Technology
Pramod Variyam , Texas Instruments Inc.
John Ridley , Texas Instruments Inc.
pp. 0351
Abhishek Singh , University of Maryland at Baltimore County
Jim Plusquellic , University of Maryland at Baltimore County
Anne Gattiker , IBM Austin Research Labs
pp. 0357
Session 17: Fault Modeling & Extraction: Moderators: G. Robinson, 3MTS
Sreejit Chakravarty , Intel Corporation
Kambiz Komeyli , Intel Corporation
Eric W. Savage , Intel Corporation
Michael J. Carruthers , Intel Corporation
Bret T. Stastny , Intel Corporation
Sujit T. Zachariah , Intel Corporation
pp. 0367
Sreejit Chakravarty , Intel Corporation
Ankur Jain , Intel Corporation
pp. 0373
Rahul Kundu , Carnegie Mellon University
R. D. (Shawn) Blanton , Carnegie Mellon University
pp. 0379
Session 18: Memory Testing: Moderators: N. Saxena, Chip Engines
Jin-Fu Li , National Tsing Hua University
Ruey-Shing Tzeng , National Tsing Hua University
Cheng-Wen Wu , National Tsing Hua University
pp. 0389
Said Hamdioui , Intel Corporation and Delft University of Technology
Zaid Al-Ars , Delft University of Technology
Ad J. van de Goor , Delft University of Technology
pp. 0395
Zaid Al-Ars , Delft University of Technology
Ad J. van de Goor , Delft University of Technology
pp. 0401
IP Session 8
C.-H. Chia , Lucent
Sujit Dey , University of California at San Diego
Faraydon Karim , ST Microelectronics
Haluk Konuk , Broadcom
Keesup Kim , Intel
pp. 0407
Session 19: Test-Cost Reduction: Moderators: D. Edenfeld, Intel
Erik H. Volkerink , Agilent Laboratories
Ajay Khoche , Agilent Laboratories
Jochen Rivoir , Agilent Laboratories
Klaus D. Hilliges , Agilent Laboratories
pp. 0411
Krishna Sekar , University of California at San Diego
Sujit Dey , University of California at San Diego
pp. 0417
Paul T. Gonciari , University of Southampton
Bashir M. Al-Hashimi , University of Southampton
Nicola Nicolici , McMaster University
pp. 0423
Session 20: Oscillation - Based Test: Moderators: B. Kaminska, IMS
Diego Vázquez , Universidad de Sevilla
Gloria Huertas , Universidad de Sevilla
Gildas Leger , Universidad de Sevilla
Adoración Rueda , Universidad de Sevilla
José L. Huertas , Universidad de Sevilla
pp. 0433
V. Beroulle , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
Y. Bertrand , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
L. Latorre , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
P. Nouet , Laboratoire d ?Informatique de Robotique et de Micro?lectronique de Montpellier
pp. 0439
Special Session 6: Panel
Special Session 7: Embedded Tutorial
Jaume Segura , University of Illes Balears
Vivek De , Intel Corporation
Ali Keshavarzi , Intel Corporation
pp. 0447
Special Session 8: Panel
S. Mir , IMAG
H. Bederr , Motorola
R. D. Blanton , Carnegie-Mellon University
H. Kerkhoff , MESA Institute
H. J. Klim , ETEC Inc.
pp. 0449
Author Index (PDF)
pp. 0451
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