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14th IEEE VLSI Test Symposium (VTS '96)
Current signatures [VLSI circuit testing]
Princeton, NJ
April 28-May 01
ISBN: 0-8186-7304-4
A.E. Gattiker, Carnegie Mellon Univ., Pittsburgh, PA, USA
W. Maly, Carnegie Mellon Univ., Pittsburgh, PA, USA
In this paper we demonstrate that performing I/sub DDQ/ testing against a single threshold current value does not make sense. In place of the single current threshold we propose the "current signature". A die's current signature takes into account the relative measured level of current on all applied I/sub DDQ/ vectors. Preliminary results of current signature applications are discussed as well.
Index Terms:
VLSI; integrated circuit testing; CMOS integrated circuits; VLSI circuit testing; I/sub DDQ/ testing; current signature; passive defects; active defects
Citation:
A.E. Gattiker, W. Maly, "Current signatures [VLSI circuit testing]," vts, pp.112, 14th IEEE VLSI Test Symposium (VTS '96), 1996
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