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14th IEEE VLSI Test Symposium (VTS '96)
Current signatures [VLSI circuit testing]
Princeton, NJ
April 28-May 01
ISBN: 0-8186-7304-4
| ASCII Text | x | ||
| A.E. Gattiker, W. Maly, "Current signatures [VLSI circuit testing]," VLSI Test Symposium, IEEE, pp. 112, 14th IEEE VLSI Test Symposium (VTS '96), 1996. | |||
| BibTex | x | ||
| @article{ 10.1109/VTEST.1996.510844, author = {A.E. Gattiker and W. Maly}, title = {Current signatures [VLSI circuit testing]}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {1996}, isbn = {0-8186-7304-4}, pages = {112}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1996.510844}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI Test Symposium, IEEE TI - Current signatures [VLSI circuit testing] SN - 0-8186-7304-4 SP EP A1 - A.E. Gattiker, A1 - W. Maly, PY - 1996 KW - VLSI; integrated circuit testing; CMOS integrated circuits; VLSI circuit testing; I/sub DDQ/ testing; current signature; passive defects; active defects VL - 0 JA - VLSI Test Symposium, IEEE ER - | |||
In this paper we demonstrate that performing I/sub DDQ/ testing against a single threshold current value does not make sense. In place of the single current threshold we propose the "current signature". A die's current signature takes into account the relative measured level of current on all applied I/sub DDQ/ vectors. Preliminary results of current signature applications are discussed as well.
Index Terms:
VLSI; integrated circuit testing; CMOS integrated circuits; VLSI circuit testing; I/sub DDQ/ testing; current signature; passive defects; active defects
Citation:
A.E. Gattiker, W. Maly, "Current signatures [VLSI circuit testing]," vts, pp.112, 14th IEEE VLSI Test Symposium (VTS '96), 1996
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