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2010 23rd International Conference on VLSI Design
Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors
Bangalore, India
January 03-January 07
ISBN: 978-0-7695-3928-7
| ASCII Text | x | ||
| Vinay Saripalli, Vijaykrishnan Narayanan, Suman Datta, "Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors," VLSI Design, International Conference on, pp. 399-404, 2010 23rd International Conference on VLSI Design, 2010. | |||
| BibTex | x | ||
| @article{ 10.1109/VLSI.Design.2010.48, author = {Vinay Saripalli and Vijaykrishnan Narayanan and Suman Datta}, title = {Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2010}, issn = {1063-9667}, pages = {399-404}, doi = {http://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2010.48}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI Design, International Conference on TI - Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors SN - 1063-9667 SP399 EP404 A1 - Vinay Saripalli, A1 - Vijaykrishnan Narayanan, A1 - Suman Datta, PY - 2010 KW - Energy Efficient KW - Single Electron Transistor KW - Energy-Delay Trade-Off VL - 0 JA - VLSI Design, International Conference on ER - | |||
This paper presents Single Electron Transistor (SET) devices operating at room temperature as an attractive option to implement low energy consumption circuits with low-to-moderate performance requirements. Currently, such circuits are implemented using CMOS technologies operating at low supply voltages. CMOS is usually leakage dominated at such a low voltage regime and various optimizations are necessary to design low energy circuits. By discussing the energy-delay trade-offs for SET devices and comparing them to those of contemporary CMOS technology, we present an argument that SET devices may be more favorable compared to CMOS from the energy and delay standpoints at low supply voltages.
Index Terms:
Energy Efficient, Single Electron Transistor, Energy-Delay Trade-Off
Citation:
Vinay Saripalli, Vijaykrishnan Narayanan, Suman Datta, "Analyzing Energy-Delay Behavior in Room Temperature Single Electron Transistors," vlsid, pp.399-404, 2010 23rd International Conference on VLSI Design, 2010
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