- V
- VLSID
- 2006
- 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)
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19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) Hyderabad, India January 03-January 07 ISBN: 0-7695-2502-4 Table of Contents
 | Introduction |
| Tutorials |
| Inaugural Keynote Address |
| Keynotes |
| Banquet Speeches |
| Plenary Sessions |
Arvind, Massachusetts Institute of Technology pp. 39
| Session 1A: Analog and Mixed-Signal Design I |
M. S. Bhat, Indian Institute of Science - Bangalore
S. Rekha, Indian Institute of Science - Bangalore pp. 51-56
A. Patra, Indian Institute of Technology - Kharagpur pp. 57-62
| Session 1B: VLSI Technology I |
| Session 1C: Interconnect Design I |
| Session 1D: Test and Diagnosis |
J. M. Vasi, Indian Institute of Technology - Bombay pp. 188-193
| Session 2A: Communications Module Architecture |
| Session 2B: Formal Verification |
| Session 2C: VLSI Architecture and FPGAs |
| Session 2D: Crosstalk Analysis |
| Session 3A: High-Level and Logic Synthesis |
Samik Das, Indian Institute of Technology - Kharagpur pp. 293-298
| Session 3B: Distribution and Noise Modeling |
Lun Ye, Agere Systems, Allentown, PA pp. 363-368
| Session 3C: Multimedia and Arithmetic Architecture |
Anupam Basu, Indian Institute of Technology - Kharagpur pp. 371-376
M. B. Srinivas, International Institute of Information Technology and SIT pp. 387-392
| Session 3D: Test Algorithms |
| Special Session: Emerging Technologies |
| Session 4A: Synthesis and Partitioning |
Anupam Basu, Indian Institute of Technology - Kharagpur pp. 469-472
| Session 4B: Memory and Logic Design |
Motoi Ichihashi, Semiconductor Technology Academic Research Center, 1Currently with Renesas Technology
Haruki Toda, Semiconductor Technology Academic Research Center, Currently with Toshiba pp. 487-490
Vivek Garg, Indian Institute of Technology - Madras pp. 507-510
| Session 4C: Communications and Multimedia Architecture I |
Anand Gautam, Dhirubhai Ambani Institute of Information and Communication Technology
A. Geeta Madhuri, Dhirubhai Ambani Institute of Information and Communication Technology
Priya Khandelwal, Dhirubhai Ambani Institute of Information and Communication Technology
K. Pratyush Aditya, Dhirubhai Ambani Institute of Information and Communication Technology
Meghana Desai, Dhirubhai Ambani Institute of Information and Communication Technology
Padma N. Krishna, Dhirubhai Ambani Institute of Information and Communication Technology
Malvika Dutt, Dhirubhai Ambani Institute of Information and Communication Technology
Reeti Bhatia, Dhirubhai Ambani Institute of Information and Communication Technology pp. 530-533
P. Mandal, Indian Institute of Technology at Kharagpur
R. Banerjee, Indian Institute of Technology at Kharagpur pp. 534-537
| Session 4D: VLSI Technology II |
S. Majumder, International Institute of Information Technology pp. 545-548
| Session 5A: Analog and Mixed-Signal Design II |
| Session 5B: Low Power/RF Design |
M. Emadi, Sharif University of Technology
F. Farbiz, University of Illinois at Urbana Champion pp. 601-605
Arijit De, Indian Institute of Technology - Kharagpur
Amit Patra, Indian Institute of Technology - Kharagpur pp. 619-624
| Session 5C: Embedded Systems |
| Session 5D: Design Tools |
Sandip Aine, Indian Institute of Technology - Kharagpur pp. 683-688
| Special Session : Emerging Technologies |
| Session 6A: Analog Design/MEMS |
| Session 6B: Low Power Design I |
| Session 6C: Interconnect Design II |
| Session 6D: Test and Design-for-Testability |
| Author Index | Usage of this product signifies your acceptance of the Terms of Use.
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