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19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)
Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing
Hyderabad, India
January 03-January 07
ISBN: 0-7695-2502-4
| ASCII Text | x | ||
| Ajay Joshi, Vinita Deodhar, Jeffrey Davis, "Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing," VLSI Design, International Conference on, pp. 773-776, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006. | |||
| BibTex | x | ||
| @article{ 10.1109/VLSID.2006.112, author = {Ajay Joshi and Vinita Deodhar and Jeffrey Davis}, title = {Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2006}, issn = {1063-9667}, pages = {773-776}, doi = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.112}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI Design, International Conference on TI - Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing SN - 1063-9667 SP773 EP776 A1 - Ajay Joshi, A1 - Vinita Deodhar, A1 - Jeffrey Davis, PY - 2006 KW - null VL - 0 JA - VLSI Design, International Conference on ER - | |||
A low power multilevel interconnect architecture that uses wave-pipelined multiplexed (WPM) interconnect routing is proposed in this paper. WPM takes advantage of existing interconnect idleness and implements low-overhead wire sharing to reduce the number of routing tracks required for intra-macrocell communication. It is shown that the extra available routing area could then be used to redesign the interconnect network to substantially reduce coupling capacitance and driver sizes. System-level simulation reveals that the systematic application of WPM reduces total power of a 40M transistor macrocell by almost 28% without any loss in performance.
Citation:
Ajay Joshi, Vinita Deodhar, Jeffrey Davis, "Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing," vlsid, pp.773-776, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006
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