- V
- VLSID
- 2005
- 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05)
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18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05) Kolkata, India January 03-January 07 ISBN: 0-7695-2264-5 Table of Contents
 | Introduction |
 | Invited Tutorial |
A. Patra, Indian Institute of Technology-Kharagpur pp. 12-13
V. R. Rao, Indian Institute of Technology-Bombay pp. 16-17
 | Inaugural Keynote Address |
 | Keynotes |
 | Banquet Speech |
 | Plenary Sessions |
 | Session 1A: Test I |
 | Papers |
Samir Roy, Kalyani Government Engineering College pp. 71-74
 | Session 1B: Physical Design |
 | Embedded Tutorial |
 | Session 1C: Embedded Systems |
Jorgen Peddersen, University of New South Wales and National Information and Communications Technology Australia
Seng Lin Shee, University of New South Wales and National Information and Communications Technology Australia
Sri Parameswaran, University of New South Wales and National Information and Communications Technology Australia pp. 111-116
 | Session 1D: Low Power |
Arijit De, Indian Institute of Technology-Kharagpur pp. 147-152
 | Session 2A: Formal Verification |
 | Session 2B: Nanotechnology and Biochips |
S. Dey, University of Texas at Austin pp. 235-240
W. Xu, Pennsylvania State University pp. 241-246
 | Session 2C: Synthesis I |
 | Session 2D: RF and Mixed Signal |
Amit Patra, Indian Institute of Technology-Kharagpur pp. 307-312
 | Session 3A: Signal Integrity and Crosstalk |
Yun Zheng, CEC Huada Electronic Design Co., Ltd.
Qing Ye, Chinese Academy of Sciences pp. 348-353
 | Session 3B: Process Variation |
S. C. Bose, Central Electronics Engineering Research Institute pp. 386-391
 | Session 3C: Design Methodology |
 | Session 3D: Placement and Routing |
 | Session 4A: Test II |
K. Kiran, Texas Instruments India Pvt. Ltd. pp. 497-503
 | Session 4B: Analog |
Amit Patra, Indian Institute of Technology-Kharagpur pp. 535-538
 | Session 4C: Architecture |
 | Session 4D: Power Estimation and Low Power Design |
 | Session 5A: Interconnect |
D. Deschacht, Laboratoire d?Informatique, de Robotique et de Micro?lectronique de Montpellier
A. Lopez, Laboratoire d?Informatique, de Robotique et de Micro?lectronique de Montpellier pp. 640-643
 | Session 5B: Synthesis II |
A. T. Erdogan, University of Edinburgh and Institute of System Level Integration, The ALBA campus
T. Arslan, University of Edinburgh and Institute of System Level Integration, The ALBA campus pp. 659-662
 | Session 5C: Power-Aware Design and Thermal Issues |
S. Majumder, International Institute of Information Technology pp. 691-696
 | Session 5D: Technology |
 | Embedded Tutorials |
 | Session 6A: Test III |
 | Session 6B: Algorithms and Applications |
 | Session 6C: Poster Presentations |
N. Sudha, Indian Institute of Technology-Madras pp. 795-798
Gerard de Haan, Eindhoven University of Technology and Philips Research Laboratories pp. 816-819
 | Session 6D: Poster Presentations and Research Scholar Forum |
A. S. Dhar, Indian Institute of Technology-Kharagpur pp. 862-865
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