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17th International Conference on VLSI Design
Digital Design: The components of a new paradigm
Mumbai, India
January 05-January 09
ISBN: 0-7695-2072-3
Rajat Gupta, Cypress Semiconductor, Bangalore, India
The digital design paradigm is in transition. We discuss on-chip programmable regulators to reduce power consumption; SERDES blocks to reduce the inter-block interconnections and small signal swing high-speed differential inputs and outputs to maximize performance in interconnect delay-dominated technologies. We need to build re-configurability and re-use of logic as an essential feature of device functionality. We need to adopt self-calibration mechanisms to solve the timing closure problem and find ways to reduce the cost of test by design.
Index Terms:
Design methodology, digital integrated circuits, logic design, design for testability, microprocessors
Citation:
Rajat Gupta, "Digital Design: The components of a new paradigm," vlsid, pp.877, 17th International Conference on VLSI Design, 2004
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