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ASP-DAC/VLSI Design 2002
Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods
Bangalore, India
January 07-January 11
ISBN: 0-7695-1441-3
| ASCII Text | x | ||
| Q. Su, V. Balakrishnan, C-K. Koh, "Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods," VLSI Design, International Conference on, pp. 311, ASP-DAC/VLSI Design 2002, 2002. | |||
| BibTex | x | ||
| @article{ 10.1109/ASPDAC.2002.994940, author = {Q. Su and V. Balakrishnan and C-K. Koh}, title = {Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2002}, isbn = {0-7695-1441-3}, pages = {311}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2002.994940}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI Design, International Conference on TI - Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods SN - 0-7695-1441-3 SP EP A1 - Q. Su, A1 - V. Balakrishnan, A1 - C-K. Koh, PY - 2002 KW - RLC interconnects KW - model reduction KW - large scale systems KW - Krylov KW - balanced truncation VL - 0 JA - VLSI Design, International Conference on ER - | |||
We present an efficient implementation of an approximate balanced truncation model reduction technique for general large-scale RLC systems, described by a state-space model where the "C" matrix in the time-domain modified nodal analysis (MNA) circuit equation "C\dot{x}=-Gx+Bu" is not necessarily invertible. The large sizes of the models that we consider make most implementations of the balance-and-truncate method impractical from the points of view of computational load and numerical conditioning. This motivates our use of Krylov subspace methods to directly compute approximate low-rank square roots of the Gramians of the original system. The approximate low-order general balanced and truncated model can then be constructed directly from these square roots. We demonstrate using three practical circuit examples that our new approach effectively gives approximate balanced and reduced order coordinates with little truncation error.
Index Terms:
RLC interconnects, model reduction, large scale systems, Krylov, balanced truncation
Citation:
Q. Su, V. Balakrishnan, C-K. Koh, "Efficient Approximate Balanced Truncation of General Large-Scale RLC Systems via Krylov Methods," vlsid, pp.311, ASP-DAC/VLSI Design 2002, 2002
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