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The 14th International Conference on VLSI Design (VLSID '01)
Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits
Bangalore, India
January 03-January 07
ISBN: 0-7695-0831-6
| ASCII Text | x | ||
| Nikhil Tripathi, Amit Bhosle, Debasis Samanta, Ajit Pal, "Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits," VLSI Design, International Conference on, pp. 227, The 14th International Conference on VLSI Design (VLSID '01), 2001. | |||
| BibTex | x | ||
| @article{ 10.1109/ICVD.2001.902665, author = {Nikhil Tripathi and Amit Bhosle and Debasis Samanta and Ajit Pal}, title = {Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2001}, issn = {1063-9667}, pages = {227}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2001.902665}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI Design, International Conference on TI - Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits SN - 1063-9667 SP EP A1 - Nikhil Tripathi, A1 - Amit Bhosle, A1 - Debasis Samanta, A1 - Ajit Pal, PY - 2001 VL - 0 JA - VLSI Design, International Conference on ER - | |||
Development of the process technology for dual threshold (dual Vth ) CMOS circuit has opened up the possibility of using it to reduce static power in low voltage high performance circuits. It has been demonstrated that by using transistors of a low threshold voltage for gates on the critical path, and by using a high threshold voltage for gates in the off-critical path it is possible to significantly reduce leakage power consumption of a circuit without performance degradation. In this paper we have proposed a new algorithm to realize dual threshold CMOS circuits. Our algorithm produces significantly better results for the ISCAS benchmark circuits compared to the reported results.
Citation:
Nikhil Tripathi, Amit Bhosle, Debasis Samanta, Ajit Pal, "Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits," vlsid, pp.227, The 14th International Conference on VLSI Design (VLSID '01), 2001
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