Significant reduction in design time for System on Chip (SoC) applications can be achieved through IP reuse. Such a design methodology encourages designers to develop IP blocks that add to a library of soft cells in anticipation of the market trends and meet stringent time to market constraints. However for application specific ICs all the hardware in each IP block may not be used. This gives rise to an opportunity to reduce the number of hardware components in such blocks depending on the application and customizing the IP or soft cell for the application context. In this paper we present a method to automatically detect and remove logic in RTL blocks (soft cells) that are not used by the embedded application thereby reducing area and power. A prototype tool ReDeEm_RTL (Re-Design in Embedded RTL, read as Redeem RTL) has been implemented to remove all redundant logic and its performance although dependent on the type of application, shows that sizable reduction in logic can be obtained.