A.B. Bhattacharyya, R.S. Rana, S.K. Guha, R. Bahl, R. Anand, M.J. Zarabi, P.A. Govindacharyulu, U. Gupta, V. Mohan, J. Roy, A. Atri, "A micropower analog hearing aid on low voltage CMOS digital process," VLSI Design, International Conference on, pp. 85, 9th International Conference on VLSI Design: VLSI in Mobile Communication, 1996.

@article{ 10.1109/ICVD.1996.489462,
author = {A.B. Bhattacharyya and R.S. Rana and S.K. Guha and R. Bahl and R. Anand and M.J. Zarabi and P.A. Govindacharyulu and U. Gupta and V. Mohan and J. Roy and A. Atri},
title = {A micropower analog hearing aid on low voltage CMOS digital process},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {1996},
issn = {1063-9667},
pages = {85},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1996.489462},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}

TY - CONF
JO - VLSI Design, International Conference on
TI - A micropower analog hearing aid on low voltage CMOS digital process
SN - 1063-9667
SP
EP
A1 - A.B. Bhattacharyya,
A1 - R.S. Rana,
A1 - S.K. Guha,
A1 - R. Bahl,
A1 - R. Anand,
A1 - M.J. Zarabi,
A1 - P.A. Govindacharyulu,
A1 - U. Gupta,
A1 - V. Mohan,
A1 - J. Roy,
A1 - A. Atri,
PY - 1996
KW - hearing aids; CMOS analogue integrated circuits; differential amplifiers; automatic gain control; micropower analog hearing aid; low voltage CMOS digital process; adaptive biasing; MOS translinear loop circuit; degenerating linearising resistor; input differential stage; AGC block; power consumption; conversion efficiency; 3 micron; 1.0 V
VL - 0
JA - VLSI Design, International Conference on
ER -