CSDL - Proceedings V

Steering Committee (PDF)

pp. viii

Program Committee (PDF)

pp. ix

Session 1: The System View

Requirements Modeling Technology: A Vision for Better, Faster, and Cheaper Systems (Abstract)

Darrell Barker, Air Force Research Laboratory

pp. 3

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On Upgrading Legacy Electronics Systems: Methodology, Enabling Technologies & Tools (Abstract)

V. Madisetti, VP Technologies, Inc.

Y-K. Jung, VP Technologies, Inc.

M. Khan, VP Technologies, Inc.

J. Kim, VP Technologies, Inc.

T. Finnessy, US Air Force Research Laboratory

pp. 7

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Session 2: System Design Approaches

Predicting the Performance of SoC Verification Technologies (Abstract)

Gregory D. Peterson, University of Tennessee at Knoxville

pp. 17

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Another Approach to System Level Design (Abstract)

Yosi Veller, Innoveda Ltd.

pp. 25

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Objects for Modeling Embedded Systems (Abstract)

J. Benzakki

pp. 32

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Session 3: Language Extensions

Automated Test Vector Generation from Rosetta Requirements (Abstract)

Krishna Ranganathan, University of Cincinnati

Murali Rangarajan, University of Cincinnati

Perry Alexander, University of Kansas

Tom Regan, TRW, Inc.

pp. 51

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Gated Clocks in RT-Synthesis and Simulation (Abstract)

Wolfgang Ecker, Infineon Technologies

Andre Windisch, Infineon Technologies

Jochen Mades, Infineon Technologies

Thomas Schneider, Infineon Technologies

Ke Yang, Infineon Technologies

pp. 59

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Session 5: XML in the VHDL Environment

HDML: Compiled VHDL in XML (Abstract)

Mohammad Hossein Reshadi, University of Tehran

Bita Gorji-Ara, University of Tehran

Zainalabedin Navabi, Northeastern University

pp. 69

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An XML-Based Meta-Model for Design of Multiprocessor Embedded Systems (Abstract)

W.O. Cesário, TIMA Laboratory

L. Gauthier, TIMA Laboratory

D. Lyonnard, TIMA Laboratory

G. Nicolescu, TIMA Laboratory

A.A. Jerraya, TIMA Laboratory

pp. 75

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Using XML for Representation and Visualization of Elaborated VHDL-AMS Models (Abstract)

T. Karayiannis, University of York

J. Mades, Technical University of Darmstadt

T. Schneider, Technical University of Darmstadt

A. Windisch, Technical University of Chemnitz

W. Ecker, Infineon Technologies

pp. 83

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Session 6: A Procedural Interface for VHDL

Testing a Procedural Interface for Conformance to a Standard (Abstract)

Uma Parvathy

Françoise Martinolle

Swaminathan Subramanian

pp. 91

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Mixed Language Design Data Access: Procedural Interface Design Considerations (Abstract)

Françoise Martinolle, Cadence Design Systems, Inc.

Uma Parvathy, Cadence Design Systems, Inc.

pp. 95

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Modeling Foreign Architectures with VHPI (Abstract)

John Shields, Avant! Corporation

pp. 100

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Session 8: Novel VHDL Application

Induction Motor Drive System Modeled in VHDL (Abstract)

M. Cirstea, De Montfort University

A. Aounis, De Montfort University

M. McCormick, De Montfort University

P. Urwin, De Montfort University

L. Haydock, Newage International Ltd

pp. 113

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A VHDL Success Story: Electric Drive System Using Neural Controller (Abstract)

Marcian Cirstea, De Montfort University

Andrei Dinu, De Montfort University

Malcolm McCormick, De Montfort University

Dan Nicula, Transilvania University of Brasov

pp. 118

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High-Level Test Generation from VHDL Behavioral Descriptions (Abstract)

Amir Massoud Gharebaghi, University of Tehran

Zainalabedin Navabi, University of Tehran

pp. 123

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Author Index (PDF)

pp. 127