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Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Performance evaluation of the IBM RISC system/6000: comparison of an optimized scalar processor with two vector processors
New York, NY, USA
November 12-November 16
ISBN: 0-8186-2056-0
| ASCII Text | x | ||
| Simmons, Wasserman, "Performance evaluation of the IBM RISC system/6000: comparison of an optimized scalar processor with two vector processors," SC Conference, pp. 132-141, Proceedings of the 1990 ACM/IEEE conference on Supercomputing, 1990. | |||
| BibTex | x | ||
| @article{ 10.1109/SUPERC.1990.130012, author = { Simmons and Wasserman}, title = {Performance evaluation of the IBM RISC system/6000: comparison of an optimized scalar processor with two vector processors}, journal ={SC Conference}, volume = {0}, year = {1990}, isbn = {0-8186-2056-0}, pages = {132-141}, doi = {http://doi.ieeecomputersociety.org/10.1109/SUPERC.1990.130012}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - SC Conference TI - Performance evaluation of the IBM RISC system/6000: comparison of an optimized scalar processor with two vector processors SN - 0-8186-2056-0 SP132 EP141 A1 - Simmons, A1 - Wasserman, PY - 1990 KW - VECOPS KW - VECSKIP KW - IBM RISC system/6000 KW - optimized scalar processor KW - vector processors KW - 6000-series computers KW - computationally intensive benchmark codes KW - scientific workload KW - 40-ns RISC KW - reduced instruction set computer KW - Convex C-240 processor KW - FPS-500 KW - 30-ns clock cycle KW - 25 MHz KW - 33 MHz VL - 0 JA - SC Conference ER - | |||
The authors report the performance of the 6000-series computers as measured using a set of portable, standard-Fortran, computationally intensive benchmark codes that represent the scientific workload at the Los Alamos National Laboratory. On all but three of the benchmark codes, the 40-ns RISC (reduced instruction set computer) system was able to perform as well as a single Convex C-240 processor, a vector processor that also has a 40-ns clock cycle, and, on these same codes, it performed as well as the FPS-500, a vector processor with a 30-ns clock cycle.
Index Terms:
VECOPS, VECSKIP, IBM RISC system/6000, optimized scalar processor, vector processors, 6000-series computers, computationally intensive benchmark codes, scientific workload, 40-ns RISC, reduced instruction set computer, Convex C-240 processor, FPS-500, 30-ns clock cycle, 25 MHz, 33 MHz
Citation:
Simmons, Wasserman, "Performance evaluation of the IBM RISC system/6000: comparison of an optimized scalar processor with two vector processors," sc, pp.132-141, Proceedings of the 1990 ACM/IEEE conference on Supercomputing, 1990
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