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18th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'06)
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
Ouro Preto, MG, Brazil
October 17-October 20
ISBN: 0-7695-2704-3
ASCII Text
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Vasanth Krishna Namasivayam, Animesh Pathak, Viktor K. Prasanna, "Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference," Computer Architecture and High Performance Computing, Symposium on, pp. 167-176, 18th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'06), 2006.
 
 
BibTex
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@article{ 10.1109/SBAC-PAD.2006.26,
author = {Vasanth Krishna Namasivayam and Animesh Pathak and Viktor K. Prasanna},
title = {Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference},
journal ={Computer Architecture and High Performance Computing, Symposium on},
volume = {0},
year = {2006},
issn = {1550-6533},
pages = {167-176},
doi = {http://doi.ieeecomputersociety.org/10.1109/SBAC-PAD.2006.26},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Computer Architecture and High Performance Computing, Symposium on
TI - Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
SN - 1550-6533
SP167
EP176
A1 - Vasanth Krishna Namasivayam,
A1 - Animesh Pathak,
A1 - Viktor K. Prasanna,
PY - 2006
KW - null
VL - 0
JA - Computer Architecture and High Performance Computing, Symposium on
ER -
 
Vasanth Krishna Namasivayam, University of Southern California, Los Angeles, USA
Animesh Pathak, University of Southern California, Los Angeles, USA
Viktor K. Prasanna, University of Southern California, Los Angeles, USA
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inference. We explore parallelism during the process of moralization, triangulation, clique identification, junction tree construction and potential table calculation. For an arbitrary Bayesian network with n vertices using p processors, the worst-case running time is shown to be O(n^2w/p+wr^wn/p+n log p), where w is the clique width and r is the number of states of the random variables. Our algorithm is scalable over 1 \leqslant p \leqslant nw/ log n.

We have implemented our parallel algorithm using OpenMP and experimented with up to 128 processors. We consider three types of Bayesian networks: linear, balanced and random. While the state of the art PNL library implementation does not scale, we achieve speedups of 31, 29 and 24 for the above graphs respectively on the DataStar cluster at San Diego Supercomputing Center.

Citation:
Vasanth Krishna Namasivayam, Animesh Pathak, Viktor K. Prasanna, "Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference," sbac-pad, pp.167-176, 18th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'06), 2006
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