• R
  • RTSS
  • 2000
  • 21st IEEE Real-Time Systems Symposium (RTSS'00)
Advanced Search 
21st IEEE Real-Time Systems Symposium (RTSS'00)
Orlando, Florida
November 27-November 30
ISBN: 0-7695-0900-2
Table of Contents
null
Session 1: Real-Time System Design and Analysis I
Scott Johnson, University of Michigan, Ann Arbor
Farnam Jahanian, University of Michigan, Ann Arbor
Akihiko Miyoshi, Carnegie Mellon University, Pittsburgh, PA
Dionisio de Niz, Carnegie Mellon University, Pittsburgh, PA
Ragunathan Rajkumar, Carnegie Mellon University, Pittsburgh, PA
pp. 3
Chenyang Lu, University of Virginia, Charlottesville
John A. Stankovic, University of Virginia, Charlottesville
Tarek F. Abdelzaher, University of Virginia, Charlottesville
Gang Tao, University of Virginia, Charlottesville
Sang H. Son, University of Virginia, Charlottesville
Michael Marley, University of Virginia, Charlottesville
pp. 13
Session 2: Distributed Real-Time Processing
Jayant R. Haritsa, Indian Institute of Science, Bangalore
Krithi Ramamritham, Indian Institute of Science, Mumbai
pp. 37
Sun-Tae Chung, Soongsil University - Seoul
Oscar Gonz?lez, Univ. of Massachusetts - Amherst
Krithi Ramamritham, Univ. of Massachusetts - Amherst
Chia Shen, Mitsubishi Electric Research Labs (Cambridge Research Lab), Massachusetts
pp. 47
V. Kalogeraki, University of California, Santa Barbara
P. M. Melliar-Smith, University of California, Santa Barbara
L. E. Moser, University of California, Santa Barbara
pp. 57
Session 3: Processor Scheduling
Session 4: Applications of Real-Time Systems Technology
Chin-Fu Kuo, National Taiwan University, Taipei
Tei-Wei Kuo, National Taiwan University, Taipei
Cheng Chang, Chung Shan Institute of Science and Technology, Lung-Tan, Taiwan
pp. 99
Prabhudev Konana, The University of Texas at Austin
Aloysius K. Mok, The University of Texas at Austin
Chan-Gun Lee, The University of Texas at Austin
Honguk Woo, The University of Texas at Austin
Guangtian Liu, SBC Technology Resources, Inc.
pp. 109
Session 5: Real-Time System Design and Analysis II
Luigi Palopoli, Scuola Superiore S. Anna, Pisa, Italy
Luca Abeni, Scuola Superiore S. Anna, Pisa, Italy
Fabio Conticelli, Scuola Superiore S. Anna, Pisa, Italy
Marco Di Natale, Scuola Superiore S. Anna, Pisa, Italy
Giorgio Buttazzo, University of Pavia (Italy)
pp. 131
Session 6: Timing Analysis and Verification
Session 7: Resource Allocation
Session 8: Networking and Real-Time Communications
Session 9: Scheduling in the Face of Overloads
Pedro Mej?a-Alvarez, CINVESTAV-IPN. Secci?n de Computaci?
Rami Melhem, University of Pittsburgh, PA
Daniel Moss?, University of Pittsburgh, PA
pp. 283
Marco Caccamo, Scuola Superiore S. Anna, Pisa (Italy)
Giorgio Buttazzo, University of Pavia (Italy)
Lui Sha, University of Illinois, Urbana
pp. 295
Usage of this product signifies your acceptance of the Terms of Use.