CSDL Home R RTAS 2013 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS)
April 9, 2013 to April 11, 2013
M. A. Awan , ISEP, Polytech. Inst. of Porto, Porto, Portugal
S. M. Petters , ISEP, Polytech. Inst. of Porto, Porto, Portugal
Modern multicore processors for the embedded market are often heterogeneous in nature. One feature often available are multiple sleep states with varying transition cost for entering and leaving said sleep states. This research effort explores the energy efficient task-mapping on such a heterogeneous multicore platform to reduce overall energy consumption of the system. This is performed in the context of a partitioned scheduling approach and a realistic power model, which improves over some of the simplifying assumptions often made in the state-of-the-art. The developed heuristic consists of two phases, in the first phase, tasks are allocated to minimise their active energy consumption, while the second phase trades off a higher active energy consumption for an increased ability to exploit savings through more efficient sleep states. Extensive simulations demonstrate the effectiveness of the approach.
Program processors, Energy consumption, Power demand, Heuristic algorithms, Resource management, Multicore processing, Voltage control,
M. A. Awan, S. M. Petters, "Energy-aware partitioning of tasks onto a heterogeneous multi-core platform", RTAS, 2013, 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS), 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS) 2013, pp. 205-214, doi:10.1109/RTAS.2013.6531093