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4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96)
An Empirical Evaluation of Techniques for Parallel Discrete-Event Simulation of Interconnection Networks
PORTUGAL
January 24-January 26
ISBN: 0-8186-7376-1
| ASCII Text | x | ||
| J. Miguel, A. Arruabarrena, R. Beivide, J.A.B. Fortes, "An Empirical Evaluation of Techniques for Parallel Discrete-Event Simulation of Interconnection Networks," 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008), pp. 0219, 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996. | |||
| BibTex | x | ||
| @article{ 10.1109/EMPDP.1996.500590, author = {J. Miguel and A. Arruabarrena and R. Beivide and J.A.B. Fortes}, title = {An Empirical Evaluation of Techniques for Parallel Discrete-Event Simulation of Interconnection Networks}, journal ={16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008)}, volume = {0}, year = {1996}, isbn = {0-8186-7376-1}, pages = {0219}, doi = {http://doi.ieeecomputersociety.org/10.1109/EMPDP.1996.500590}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008) TI - An Empirical Evaluation of Techniques for Parallel Discrete-Event Simulation of Interconnection Networks SN - 0-8186-7376-1 SP EP A1 - J. Miguel, A1 - A. Arruabarrena, A1 - R. Beivide, A1 - J.A.B. Fortes, PY - 1996 KW - multiprocessor interconnection networks; discrete event simulation; message passing; synchronisation; software performance evaluation; parallel programming; virtual machines; empirical evaluation; parallel discrete-event simulation; interconnnection networks; synchronous simulation; conservative simulation; optimistic simulation; Intel Paragon multicomputer; model decomposition; collaborative logical processes; process synchronization overhead; causal restrictions; message-passing network models; model parameters; simulator performance; workload; scalability; performance threshold; network size; load level; message length; processor number VL - 0 JA - 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008) ER - | |||
Abstract: Three parallel discrete-event simulators-synchronous, conservative and optimistic-implemented on an Intel Paragon multicomputer are comparatively evaluated. Parallelism is achieved by model decomposition, distributing the simulation among a set of collaborative logical processes. The three simulators differ in the way those processes synchronize to obey causal restrictions in the simulation of events. Message passing network models are used to study these simulation alternatives. A set of experiments are carried out to understand how model parameters influence simulator performance. Experimental evidence leads to the conclusion that the optimistic simulator is not a viable tool for the analysis of this kind of models. The opposite conclusion applies to the other two: if the workload assigned to each logical process is above a certain threshold then the synchronization overhead is comparatively low and the simulators perform and scale well up to a large number of processors. The performance threshold is influenced by some parameters of the simulated model (size of the network, load level and message length), as well as by the number of processors used by the simulators.
Index Terms:
multiprocessor interconnection networks; discrete event simulation; message passing; synchronisation; software performance evaluation; parallel programming; virtual machines; empirical evaluation; parallel discrete-event simulation; interconnnection networks; synchronous simulation; conservative simulation; optimistic simulation; Intel Paragon multicomputer; model decomposition; collaborative logical processes; process synchronization overhead; causal restrictions; message-passing network models; model parameters; simulator performance; workload; scalability; performance threshold; network size; load level; message length; processor number
Citation:
J. Miguel, A. Arruabarrena, R. Beivide, J.A.B. Fortes, "An Empirical Evaluation of Techniques for Parallel Discrete-Event Simulation of Interconnection Networks," pdp, pp.0219, 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996
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