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3rd Euromicro Workshop on Parallel and Distributed Processing
Parallel simulation of message routing networks
San Remo, Italy
January 25-January 27
ISBN: 0-8186-7031-2
J. Miguel, Dept. Arquitectura y Tecnologia de Computadores, UPV/EHU, San Sebastian, Spain
A. Arruabarrena, Dept. Arquitectura y Tecnologia de Computadores, UPV/EHU, San Sebastian, Spain
C. Izu, Dept. Arquitectura y Tecnologia de Computadores, UPV/EHU, San Sebastian, Spain
R. Beivide, Dept. Arquitectura y Tecnologia de Computadores, UPV/EHU, San Sebastian, Spain
An implementation of a conservative parallel simulator with deadlock avoidance is presented. Its performance when working with a realistic model of a message routing network is evaluated and contrasted against a sequential simulator. Different factors that improve the performance of the parallel simulation are discussed, focusing in the model under study and the available computer: a network of transputers. These factors are the load of the model being simulated, the grain size of the simulator and the simulator ability to exploit the lookahead property of the model.
Index Terms:
parallel programming; parallel machines; distributed memory systems; transputer systems; digital simulation; message passing; parallel simulation; message routing networks; conservative parallel simulator; deadlock avoidance; realistic model; message routing network; sequential simulator; transputers; grain size; lookahead property
Citation:
J. Miguel, A. Arruabarrena, C. Izu, R. Beivide, "Parallel simulation of message routing networks," pdp, pp.138, 3rd Euromicro Workshop on Parallel and Distributed Processing, 1995
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