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11th International Conference on Parallel Architectures and Compilation Techniques (PACT'02)
Charlottesville, Virginia
September 22-September 25
ISBN: 0-7695-1620-3
Table of Contents
Introduction
Keynote Address
Session 1: Data Parallelism and Threading
Samuel Larsen, Massachusetts Institute of Technology
Emmett Witchel, Massachusetts Institute of Technology
Saman Amarasinghe, Massachusetts Institute of Technology
pp. 18
Session 2: Compiler Support for Architecture
Jaewook Shin, University of Southern California
Jacqueline Chame, University of Southern California
Mary W. Hall, University of Southern California
pp. 45
Xiaotong Zhuang, Georgia Institute of Technology
Santosh Pande, Georgia Institute of Technology
John S. Greenland Jr., Green Hills Software, Inc.
pp. 68
Session 3: Program Characterization
Eric S. Tune, University of California at San Diego
Dean M. Tullsen, University of California at San Diego
Brad Calder, University of California at San Diego
pp. 104
Session 4: Power
L. Li, Pennsylvania State University
I. Kadayif, Pennsylvania State University
Y-F. Tsai, Pennsylvania State University
N. Vijaykrishnan, Pennsylvania State University
M. Kandemir, Pennsylvania State University
M. J. Irwin, Pennsylvania State University
A. Sivasubramaniam, Pennsylvania State University
pp. 131
Steve Dropsho, University of Rochester
Alper Buyuktosunoglu, University of Rochester
Rajeev Balasubramonian, University of Rochester
David H. Albonesi, University of Rochester
Sandhya Dwarkadas, University of Rochester
Greg Semeraro, University of Rochester
Grigorios Magklis, University of Rochester
Michael L. Scott, University of Rochester
pp. 141
Session 5: Prediction
Manuel E. Acacio, Universidad de Murcia
José González, Intel Barcelona Research Center
José M. García, Universidad de Murcia
José Duato, Universidad Politécnica de Valencia
pp. 155
Session 6: Memory Performance
Daniel Ortega, Universidad Politécnica de Cataluña
Eduard Ayguadé, Universidad Politécnica de Cataluña
Jean-Loup Baer, University of Washington
Mateo Valero, Universidad Politécnica de Cataluña
pp. 189
Zhenlin Wang, University of Massachusetts at Amherst
Kathryn S. McKinley, University of Texas at Austin
Arnold L. Rosenberg, University of Massachusetts at Amherst
Charles C. Weems, University of Massachusetts at Amherst
pp. 199
Session 7: Memory Aliasing
Benjamin Goldberg, New York University
Emily Crutcher, New York University
Chad Huneycutt, Georgia Institute of Technology
Krishna Palem, Georgia Institute of Technology
pp. 211
Manel Fernández, Universitat Politècnica de Catalunya
Roger Espasa, Universitat Politècnica de Catalunya
pp. 222
Session 8: Java and IA-64
Kazuaki Ishizaki, IBM Research, Tokyo Research Laboratory
Tatsushi Inagaki, IBM Research, Tokyo Research Laboratory
Hideaki Komatsu, IBM Research, Tokyo Research Laboratory
Toshio Nakatani, IBM Research, Tokyo Research Laboratory
pp. 259
Session 9: Clustered Microarchitectures
Yi Qian, Michigan Technological University
Steve Carr, Michigan Technological University
Philip Sweany, Texas Instruments
pp. 271
Jesús Sánchez, UPC and Intel Barcelona Research Center
Antonio González, UPC and Intel Barcelona Research Center
David Kaeli, Northeastern University
pp. 281
Joan-Manuel Parcerisa, Universitat Polit?cnica de Catalunya
Julio Sahuquillo, Universitat Polit?cnica de Val?ncia
Antonio González, Universitat Polit?cnica de Catalunya and Intel Barcelona Research Center
José Duato, Universitat Polit?cnica de Val?ncia
pp. 291
SIGARCH Conference Guidelines
Author Index
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