CSDL - Proceedings P

Conference Organizers (PDF)

pp. ix

Program Committee (PDF)

pp. x

Session 1: Simulation and Modeling

Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications (Abstract)

Timothy Sherwood, University of California, San Diego

Erez Perelman, University of California, San Diego

Brad Calder, University of California, San Diego

pp. 0003

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Modeling Superscalar Processors via Statistical Simulation (Abstract)

Sébastien Nussbaum, University of Wisconsin - Madison

James E. Smith, University of Wisconsin - Madison

pp. 0015

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Hybrid Analytical-Statistical Modeling for Efficiently Exploring Architecture and Workload Design Spaces (Abstract)

Lieven Eeckhout, Ghent University

Koen de Bosschere, Ghent University

pp. 0025

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Session 2: Efficient Caches

Filtering Techniques to Improve Trace-Cache Efficiency (Abstract)

Roni Rosner, Intel Corporation

Avi Mendelson, Intel Corporation

Ronny Ronen, Intel Corporation

pp. 0037

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Reactive-Associative Caches (Abstract)

Brannon Batson, Compaq Computer Corporation

T. N. Vijaykumar, Purdue University

pp. 0049

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Adaptive Mode Control: A Static-Power-Efficient Cache Design (Abstract)

Huiyang Zhou, North Carolina State University

Mark C. Toburen, North Carolina State University

Eric Rotenberg, North Carolina State University

Thomas M. Conte, North Carolina State University

pp. 0061

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Session 3: Specialized Instruction Sets

Implementation and Evaluation of the Complex Streamed Instruction Set (Abstract)

Ben Juurlink, Delft University of Technology

Stamatis Vassiliadis, Delft University of Technology

Dmitri Tcheressiz, Leiden University

Harry A.G. Wijshoff, Leiden University

pp. 0073

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On the Efficiency of Reductions in ?-SIMD Media Extensions (Abstract)

Jesus Corbal, Universitat Polit?cnica de Catalunya

Roger Espasa, Universitat Polit?cnica de Catalunya

Mateo Valero, Universitat Polit?cnica de Catalunya

pp. 0083

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Session 4: Prediction and Recovery

Boolean Formula-Based Branch Prediction for Future Technologies (Abstract)

Daniel A. Jiménez, The University of Texas at Austin

Heather L. Hanson, The University of Texas at Austin

Calvin Lin, The University of Texas at Austin

pp. 0097

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Using Dataflow Based Context for Accurate Value Prediction (Abstract)

Renju Thomas, University of Maryland

Manoj Franklin, University of Maryland

pp. 0107

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Recovery Mechanism for Latency Misprediction (Abstract)

Enric Morancho, Universitat Polit?cnica de Catalunya

José María Llabería, Universitat Polit?cnica de Catalunya

Àngel Olivé, Universitat Polit?cnica de Catalunya

pp. 0118

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Session 5: Memory Optimization

A Cost Framework for Evaluating Integrated Restructuring Optimizations (Abstract)

Bharat Chandramouli, University of Utah

John B. Carter, University of Utah

Wilson C. Hsieh, University of Utah

Sally A. McKee, University of Utah

pp. 0131

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Compiling for the Impulse Memory Controller (Abstract)

Xianglong Huang, University of Massachusetts, Amherst

Zhenlin Wang, University of Massachusetts, Amherst

Kathryn S. McKinley, University of Massachusetts, Amherst

pp. 0141

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On the Stability of Temporal Data Reference Profiles (Abstract)

Trishul M. Chilimbi, Microsoft Research

pp. 0151

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Session 6: Program Optimization

Code Reordering and Speculation Support for Dynamic Optimization Systems (Abstract)

Erik M. Nystrom, University of Illinois

Ronald D. Barnes, University of Illinois

Matthew C. Merten, University of Illinois

Wen-mei W. Hwu, University of Illinois

pp. 0163

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A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors (Abstract)

Josep M. Codina, Universitat Polit?cnica de Catalunya

Jesús Sánchez, Universitat Polit?cnica de Catalunya

Antonio González, Universitat Polit?cnica de Catalunya

pp. 0175

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Cache-Friendly Implementations of Transitive Closure (Abstract)

Michael Penner, University of Southern California

Viktor K Prasanna, University of Southern California

pp. 0185

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Session 7: Technology Implications

Exploring the Design Space of Future CMPs (Abstract)

Jaehyuk Huh, The University of Texas at Austin

Doug Burger, The University of Texas at Austin

Stephen W. Keckler, The University of Texas at Austin

pp. 0199

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Area and System Clock Effects on SMT/CMP Processors (Abstract)

James Burns, Intel

Jean-Luc Gaudiot, University of Southern California

pp. 0211

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Session 8: Parallel Machines

Limits on Speculative Module-Level Parallelism in Imperative and Object-Oriented Programs on CMP Platforms (Abstract)

Fredrik Warg, Chalmers University of Technology

Per Stenström, Chalmers University of Technology

pp. 0221

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Compiler and Runtime Analysis for Efficient Communication in Data Intensive Applications (Abstract)

Renato Ferreira, University of Maryland, College Park

Joel Saltz, University of Maryland, College Park

Gagan Agrawal, University of Delaware

pp. 0231

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Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors (Abstract)

María Jesús Garzarán, Universidad de Zaragoza

Milos Prvulovic, University of Illinois at Urbana-Champaign

Ye Zhangy, University of Illinois at Urbana-Champaign

Josep Torrellas, University of Illinois at Urbana-Champaign

Alin Jula, Texas A&M University

Hao Yu, Texas A&M University

Lawrence Rauchwerger, Texas A&M University

pp. 0243

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Session 9: Data Prefetching

Optimizing Software Data Prefetches with Rotating Registers (Abstract)

Gautam Doshi, Intel Corporation

Rakesh Krishnaiyer, Intel Corporation

Kalyan Muthukumar, Intel Technology India Pvt Ltd

pp. 0257

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Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes (Abstract)

Nicholas Kohout, Intel Corp.

Seungryul Choi, Univ. of Maryland, College Park

Dongkeun Kim, Univ. of Maryland, College Park

Donald Yeung, Univ. of Maryland, College Park

pp. 0268

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Data Flow Analysis for Software Prefetching Linked Data Structures in Java (Abstract)

Brendon Cahoon, University of Massachusetts

Kathryn S. McKinley, University of Massachusetts

pp. 0280

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Comparing and Combining Read Miss Clustering and Software Prefetching (Abstract)

Vijay S. Pai, Rice University

Sarita V. Adve, University of Illinois

pp. 0292

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Author Index (PDF)

pp. 0305