- N
- NOCS
- 2007
- First International Symposium on Networks-on-Chip (NOCS'07)
| | This Publication | | | | | | | |
| | | | Bibliographic References | | | |
| | | | |
First International Symposium on Networks-on-Chip (NOCS'07) Princeton, New Jersey May 07-May 09 ISBN: 0-7695-2773-6 Table of Contents
 | Introduction |
 | Tutorial: Networks on Chips |
Network Layer Protocols and Performance Analysis
Power, Energy and Reliability Issues in NoC
Tooling, OS Services and Middleware
 | Keynote 1 |
 | Session 1: NoC Design Case Studies |
Paul Gratz, The University of Texas at Austin, USA pp. 7-17
Donghyun Kim, Korea Advanced Institute of Science and Technology (KAIST), Korea
Kwanho Kim, Korea Advanced Institute of Science and Technology (KAIST), Korea
Joo-Young Kim, Korea Advanced Institute of Science and Technology (KAIST), Korea
Seung-Jin Lee, Korea Advanced Institute of Science and Technology (KAIST), Korea
Hoi-Jun Yoo, Korea Advanced Institute of Science and Technology (KAIST), Korea pp. 30-39
 | Session 2: Technology and Circuit Technologies |
Shuming Chen, National University of Defense Technology, China pp. 75-82
 | Session 3: System Architecture, Verification and Debug |
Kees Goossens, NXP Semiconductors, The Netherlands; Technical University Delft, The Netherlands pp. 95-106
H. Corporaal, Technical University Eindhoven, The Netherlands pp. 107-116
Zvika Guz, Israel Institute of Technology, Israel pp. 117-126
 | Keynote 2 |
 | Session 4: Routing and Topology |
George Michelogiannakis, Institute of Computer Science, Foundation for Research & Technology-Hellas (FORTH), Greece
Dionisios Pnevmatikatos, Institute of Computer Science, Foundation for Research & Technology-Hellas (FORTH), Greece
Manolis Katevenis, Institute of Computer Science, Foundation for Research & Technology-Hellas (FORTH), Greece pp. 153-162
K.P. Lam, The Chinese University of Hong Kong, Hong Kong pp. 173-182
J. Flich, Universidad Politecnica de Valencia, Spain
A. Mejia, Universidad Politecnica de Valencia, Spain
P. Lopez, Universidad Politecnica de Valencia, Spain
J. Duato, Universidad Politecnica de Valencia, Spain pp. 183-194
 | Panel Session |
 | Poster Session |
Sheng Xu, University of Massachusetts Amherst, USA pp. 220
 | Session 5: Reconfigurable NoCs |
Kees Goossens, Delft University of Technology, The Netherlands; NXP Semiconductors, The Netherlands pp. 233-242
Habib Mehrez, LIP6, Universite Pierre et Marie Curie, France pp. 243-252
 | Dinner Speaker |
 | Keynote 3 |
 | Session 6: CAD and Methodology for NoCs |
David Atienza, LSI, EPFL, Switzerland; Complutense University, Spain pp. 273-282
 | Session 7: NoC Mapping and Simulation |
 | Author Index | Usage of this product signifies your acceptance of the Terms of Use.
| | | | | | | |