loading...
  • M
  • MTV
  • 2005
  • Sixth International Workshop on Microprocessor Test and Verification (MTV'05)
Advanced Search 
Sixth International Workshop on Microprocessor Test and Verification (MTV'05)
Austin, Texas
November 03-November 05
ISBN: 0-7695-2627-6
Table of Contents
Introduction
Architecture Description Languages
Brian Kahne, Freescale Semiconductor Inc, USA
Aseem Gupta, University of California, Irvine, USA
Peter Wilson, Freescale Semiconductor Inc, USA
Nikil Dutt, University of California, Irvine, USA
pp. 12-22
SAT Applications
Marc Herbstritt, Albert-Ludwigs-University, Germany
Bernd Becker, Albert-Ludwigs-University, Germany
pp. 23-28
Tobias Schubert, Albert-Ludwigs-University of Freiburg, Germany
Matthew Lewis, Albert-Ludwigs-University of Freiburg, Germany
Bernd Becker, Albert-Ludwigs-University of Freiburg, Germany
pp. 29-36
Debug and Diagnosis
P. Bernardi, Politecnico di Torino, Italy
E. Sanchez, Politecnico di Torino, Italy
M. Schillaci, Politecnico di Torino, Italy
M. Sonza Reorda, Politecnico di Torino, Italy
G. Squillero, Politecnico di Torino, Italy
pp. 37-41
Moayad Fahim Ali, University of Toronto, Canada
Sean Safarpour, University of Toronto, Canada
Andreas Veneris, University of Toronto, Canada
Magdy S. Abadir, Freescale Semiconductor, USA
Rolf Drechsler, University of Bremen, Germany
pp. 42-47
P. Bernardi, Politecnico di Torino, Italy
M. Grosso, Politecnico di Torino, Italy
M. Rebaudengo, Politecnico di Torino, Italy
M. Sonza Reorda, Politecnico di Torino, Italy
pp. 55-62
High Level Test and ATPG
G. Di Guglielmo, Universita di Verona, Italy
F. Fummi, Universita di Verona, Italy
C. Marconcini, Universita di Verona, Italy
G. Pravadelli, Universita di Verona, Italy
pp. 70-75
Charles H.-P. Wen, University of California, Santa Barbara, USA
Li-C. Wang, University of California, Santa Barbara, USA
pp. 76-83
Jorge Campos, University of California, Davis, USA
Hussain Al-Asaad, University of California, Davis, USA
pp. 84-89
Validation
David Berner, Institut de Recherche en Informatique et Systemes Aleatoires (IRISA/INRIA), France
Hiren D. Patel, Virginia Polytechnic and State University, USA
Deepak A. Mathaikutty, Virginia Polytechnic and State University, USA
Sandeep K. Shukla, Virginia Polytechnic and State University, USA
pp. 99-104
Jayanta Bhadra, Freescale Semiconductor Inc., USA
Magdy S. Abadir, Freescale Semiconductor Inc., USA
David Burgess, Freescale Semiconductor Inc., USA
Ekaterina Trofimova, Freescale Semiconductor Inc., USA
pp. 111-118
Prabhat Mishra, University of Florida, USA
Heon-Mo Koo, University of Florida, USA
Zhuo Huang, University of Florida, USA
pp. 119-126
Advances in Verification Methodology for Complex Designs
Daniel Gro?e, University of Bremen, Germany
Ulrich K?, University of Bremen, Germany
Rolf Drechsler, University of Bremen, Germany
pp. 133-137
Brian Kahne, Freescale Semiconductor Inc, USA
Magdy Abadir, Freescale Semiconductor Inc, USA
pp. 138-142
Author Index
Usage of this product signifies your acceptance of the Terms of Use.