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Proceedings. 5th International Workshop on Microprocessor Test and Verification. Common Challenges and Solutions (2004)
Austin, TX
Sept. 9, 2004 to Sept. 10, 2004
ISBN: 0-7695-2320-X
TABLE OF CONTENTS
Introduction
Preface (PDF)
pp. vii
Backmatter
Introduction
pp. viii
Preface (PDF)
pp. vii
Introduction
Session A: Functional Test Generation
W. Lindsay , Intel® Corporation
E. Sanchez , Politecnico di Torino
M. Sonza Reorda , Politecnico di Torino
G. Squillero , Politecnico di Torino
pp. 8-13
Session B: SOC Test
Arkan Abdulrahman , Southern Illinois University
Spyros Tragoudas , Southern Illinois University
pp. 16-21
P. Bernardi , Politecnico di Torino
M. Rebaudengo , Politecnico di Torino
M. Sonza Reorda , Politecnico di Torino
pp. 22-27
Session C: Modeling and Verification Method
Syed Suhaib , Virginia Polytechnic and State University
Deepak Mathaikutty , Virginia Polytechnic and State University
Sandeep Shukla , Virginia Polytechnic and State University
David Berner , Institut de Recherche en Informatique et Systèmes Aléatoires
pp. 30-35
Xiuli Sun , Chinese Academy of Sciences
Jinzhao Wu , Universität Mannheim
Xiaoyu Song , Portland State University
Mila Majster-Cederbaum , Universität Mannheim
pp. 36-41
Session D: SAT and Applications
Moayad Fahim Ali , University of Toronto
Andreas Veneris , University of Toronto
Sean Safarpour , University of Toronto
Magdy Abadir , Freescale Semiconductor, Inc.
Rolf Drechsler , University of Bremen
Alexander Smith , University of Toronto
pp. 44-49
Marc Herbstritt , Albert-Ludwigs-University
Thomas Kmieciak , Albert-Ludwigs-University
Bernd Becker , Albert-Ludwigs-University
pp. 50-55
Tobias Schubert , Albert - Ludwigs - University of Freiburg
Bernd Becker , Albert - Ludwigs - University of Freiburg
pp. 56-61
Session E: Functional Verification
Prabhat Mishra , University of Florida
Nikil Dutt , University of California at Irvine
Yaron Kashai , Verisity Design, Inc.
pp. 79-84
M. Borgatti , ST-Microlectronics
A. Fedeli , ST-Microlectronics
U. Rossi , ST-Microlectronics
J.-L. Lambert , TNI-Valiosys
I. Moussa , TNI-Valiosys
F. Fummi , Università di Verona
C. Marconcini , Università di Verona
G. Pravadelli , Università di Verona
pp. 85-90
Session F: Advanced Test
M. Moiz Khan , Southern Illinois University
Spyros Tragoudas , Southern Illinois University
Magdy Abadir , Freescale Semiconductor Inc.
Brandon Liu , Freescale Semiconductor Inc.
pp. 92-96
Xiang Lu , Texas A&M University
Zhuo Li , Texas A&M University
Wangqi Qiu , Texas A&M University
D. M. H. Walker , Texas A&M University
Weiping Shi , Texas A&M University
pp. 97-102
J. Zeng , Freescale Semiconductor Inc.
M. S. Abadir , Freescale Semiconductor Inc.
G. Vandling , Cadence Design Systems
L.-C. Wang , University of California at Santa Barbara
S. Karako , Freescale Semiconductor Inc.
J. A. Abraham , University of Texas at Austin
pp. 103-109
Special Session G: Micro-Architecture Verification
Eyal Bin , IBM Labs in Haifa
Laurent Fournier , IBM Labs in Haifa
pp. 112-113
Backmatter
Author Index (PDF)
pp. 114
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