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Fifth International Workshop on Microprocessor Test and Verification (MTV'04)
Austin, Texas
September 09-September 10
ISBN: 0-7695-2320-X
| ASCII Text | x | ||
| Eyal Bin, Laurent Fournier, "Micro-Architecture Verification for Microprocessors," Fifth International Workshop on Microprocessor Test and Verification (MTV'04), pp. 112-113, Fifth International Workshop on Microprocessor Test and Verification (MTV'04), 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/MTV.2004.16, author = {Eyal Bin and Laurent Fournier}, title = {Micro-Architecture Verification for Microprocessors}, journal ={Fifth International Workshop on Microprocessor Test and Verification (MTV'04)}, volume = {0}, year = {2004}, issn = {1550-4093}, pages = {112-113}, doi = {http://doi.ieeecomputersociety.org/10.1109/MTV.2004.16}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Fifth International Workshop on Microprocessor Test and Verification (MTV'04) TI - Micro-Architecture Verification for Microprocessors SN - 1550-4093 SP112 EP113 A1 - Eyal Bin, A1 - Laurent Fournier, PY - 2004 KW - null VL - 0 JA - Fifth International Workshop on Microprocessor Test and Verification (MTV'04) ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTV.2004.16
We present a tool and a methodology for micro-architecture verification of microprocessors. This document serves as an introduction to the invited talk in the special session on micro-architecture verification of microprocessors.
Citation:
Eyal Bin, Laurent Fournier, "Micro-Architecture Verification for Microprocessors," mtv, pp.112-113, Fifth International Workshop on Microprocessor Test and Verification (MTV'04), 2004
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