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| Victor Chao-Wei Kuo, Chih-Ming Chao, Chih-Kai Kang, Li-Wei Liu, Tzung-Bin Huang, Liang-Tai Kuo, Shi-Hsien Chen, Houng-Chi Wei, Hann-Ping Hwang, Saysamone Pittikoun, "Detailed Comparisons of Program, Erase and Data Retention Characteristics between P+- and N+-Poly SONOS NAND Flash Memory," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 77-79, 2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06), 2006. | |||
| BibTex | x | ||
| @article{ 10.1109/MTDT.2006.10, author = {Victor Chao-Wei Kuo and Chih-Ming Chao and Chih-Kai Kang and Li-Wei Liu and Tzung-Bin Huang and Liang-Tai Kuo and Shi-Hsien Chen and Houng-Chi Wei and Hann-Ping Hwang and Saysamone Pittikoun}, title = {Detailed Comparisons of Program, Erase and Data Retention Characteristics between P+- and N+-Poly SONOS NAND Flash Memory}, journal ={Memory Technology, Design and Testin, IEEE International Workshop on}, volume = {0}, year = {2006}, issn = {1087-4852}, pages = {77-79}, doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2006.10}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Memory Technology, Design and Testin, IEEE International Workshop on TI - Detailed Comparisons of Program, Erase and Data Retention Characteristics between P+- and N+-Poly SONOS NAND Flash Memory SN - 1087-4852 SP77 EP79 A1 - Victor Chao-Wei Kuo, A1 - Chih-Ming Chao, A1 - Chih-Kai Kang, A1 - Li-Wei Liu, A1 - Tzung-Bin Huang, A1 - Liang-Tai Kuo, A1 - Shi-Hsien Chen, A1 - Houng-Chi Wei, A1 - Hann-Ping Hwang, A1 - Saysamone Pittikoun, PY - 2006 KW - null VL - 0 JA - Memory Technology, Design and Testin, IEEE International Workshop on ER - | |||
In this paper, one of the future nonvolatile memory candidates, SONOS with p+-poly gate, has been fully characterized in cell program/erase operation and data retention performance. Novel source-side injection programming and F-N erase schemes have been utilized on both n+- and p+-poly gate, and its characteristics are very satisfactory and can be easily used as a state-of-the-art flash memory.
For data retention, our experimental result shows p+-poly does have a slower charge decay rate than does n+-poly gate. This is because of the work function difference between n+- and p+-poly gate that causes the different amount of trapped electrons between two of them. We also predict the charge loss characteristics with various baking temperature for n+- and p+-poly gate, which can tell us the concrete threshold voltage at any read delay time instead of the traditional and inaccurate long time projection from short time status.