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Records of the 2004 International Workshop on Memory Technology, Design and Testing (MTDT'04)
San Jose, California, USA
August 09-August 10
ISBN: 0-7695-2193-2
Table of Contents
Introduction
Session 1: Special Session
null
Low Power Memory Design
Memory Redundancy and BISR
Session 2: Fast ECC and Efficient Cache Controllers
null
Adil Akaaboune, Southern Illinois University at Carbondale
Nazeih Botros, Southern Illinois University at Carbondale
Jaafar Alghazo, Southern Illinois University at Carbondale
pp. 13-18
Jaafar Alghazo, Southern Illinois University at Carbondale
Adil Akaaboune, Southern Illinois University at Carbondale
Nazeih Botros, Southern Illinois University at Carbondale
pp. 19-24
Session 3: Memory Fault Coverage and Test Analysis
null
Ad J. van de Goor, Delft University of Technology
Said Hamdioui, Delft University of Technology
Zaid Al-Ars, Delft University of Technology
pp. 26-31
Zaid Al-Ars, CatRam Solutions, Delft University of Technology and Infineon Technologies
Martin Herzog, Infineon Technologies
Ivo Schanstra, Infineon Technologies
Ad J. van de Goor, Delft University of Technology
pp. 32-37
Luca Schiano, Northeastern University
Marco Ottavi, Northeastern University
Fabrizio Lombardi, Northeastern University
pp. 38-43
Session 4: Special Session
null
Session 5: Embedded Memory Test Trends and Future
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Said Hamdioui, Delft University of Technology
Georgi Gaydadjiev, Delft University of Technology
Ad J. van de Goor, Delft University of Technology
pp. 54-59
Shyue-Kung Lu, Fu Jen Catholic University
Shih-Chang Huang, Fu Jen Catholic University
pp. 60-64
Li-Ming Denq, National Tsing Hua University
Rei-Fu Huang, National Tsing Hua University
Cheng-Wen Wu, National Tsing Hua University
Yeong-Jar Chang, Industrial Technology Research Institute
Wen-Ching Wu, Industrial Technology Research Institute
pp. 65-69
Session 6: Industrial Practices on BIST, BISD and BISR
null
R. Zappa, STMicroelectronics
C. Selva, STMicroelectronics
D. Rimondi, STMicroelectronics
C. Torelli, STMicroelectronics
M. Crestan, STMicroelectronics
G. Mastrodomenico, STMicroelectronics
L. Albani, STMicroelectronics
pp. 72-77
Carolina Selva, STMicroelectronics
Cosimo Torelli, STMicroelectronics
Danilo Rimondi, STMicroelectronics
Rita Zappa, STMicroelectronics
Stefano Corbani, STMicroelectronics
Giovanni Mastrodomenico, STMicroelectronics
Lara Albani, STMicroelectronics
pp. 84-89
Session 7: EDA Solutions to Test and Repair Memories
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R. Dean Adams, Magma Design Automation
Robert Abbott, Magma Design Automation
Xiaoliang Bai, Magma Design Automation
Dwayne Burek, Magma Design Automation
Eric MacDonald, University of Texas at El Paso
pp. 92-95
Repair Interfaces for Redundant Memories
Session 8: Making Memories More Reliable
null
N. Derhacobian, Virage Logic Corporation
V. A. Vardanian, Virage Logic Corporation
Y. Zorian, Virage Logic Corporation
pp. 104-110
Author Index
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