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Memory Technology, Design and Testin, IEEE International Workshop on (1999)
San Jose, California
Aug. 9, 1999 to Aug. 10, 1999
ISBN: 0-7695-0259-8
TABLE OF CONTENTS
Session I: Tutorial on Low Power SRAMs
Martin Margala , University of Alberta
pp. 6
Session II: Architecture and Applications
Luke Roth Lee Coraor , Pennsylvania State University
Paul Hulina , Pennsylvania State University
Scott Deno , Pennsylvania State University
pp. 8
David L. Rhodes , United States Army and Princeton University
Wayne Wolf , Princeton University
pp. 16
Session III: Diagnosis and Yield
Jeff Campbell , Chipworks Incorporated
Sherri Griffin , Chipworks Incorporated
Dick James , Chipworks Incorporated
Ray Haythornthwaite , Chipworks Incorporated
pp. 34
Jun Zhao , Texas A&M University
Fred J. Meyer , Northeastern University
Fabrizio Lombardi , Northeastern University
pp. 40
Session IV: Tutorial on SDRAMs
Joerg Vollrath , White Oak Semiconductor
pp. 62
Session V: Memory Testing topics
Ilyoung Kim , Lucent Technologies
Larry Fenstermaker , Lucent Technologies
Jeffrey J. Nagy , Lucent Technologies
pp. 72
Daniel P. Van der Velde , Delft University of Technology
A.J. v.d. Goor , Delft University of Technology
pp. 91
Session VI: Special Session
Session VII: New Ideas in Technology and Design
Duncan G. Elliott , University of Alberta
Gershom Birk , University of Alberta
pp. 102
Mark Brehob , Michigan State University
Richard Enbody , Michigan State University
pp. 110
Martin Margala , University of Alberta
pp. 115
Betty Prince , Memory Strategies International
pp. 123
Author Index (PDF)
pp. 131
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