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1999 IEEE International Workshop on Memory Technology, Design, and Testing
San Jose, California
August 09-August 10
ISBN: 0-7695-0259-8
Table of Contents
Keynote Address
Session I: Tutorial on Low Power SRAMs
Session II: Architecture and Applications
Luke Roth Lee Coraor, Pennsylvania State University
David Landis, Pennsylvania State University
Paul Hulina, Pennsylvania State University
Scott Deno, Pennsylvania State University
pp. 8
David L. Rhodes, United States Army and Princeton University
Wayne Wolf, Princeton University
pp. 16
Session III: Diagnosis and Yield
Sue Brown, Chipworks Incorporated
Jeff Campbell, Chipworks Incorporated
Sherri Griffin, Chipworks Incorporated
Dick James, Chipworks Incorporated
Ray Haythornthwaite, Chipworks Incorporated
pp. 34
Session IV: Tutorial on SDRAMs
Session V: Memory Testing topics
Daniel P. Van der Velde, Delft University of Technology
A.J. v.d. Goor, Delft University of Technology
pp. 91
Session VI: Special Session
Panel on Memories, IP and System-on-a-Chip
Session VII: New Ideas in Technology and Design
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