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  • MTDT
  • 1998
  • IEEE International Workshop on Memory Technology, Design and Testing
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IEEE International Workshop on Memory Technology, Design and Testing
San Jose, California
August 24-August 25
ISBN: 0-8186-8494-1
Table of Contents
Session 1: Embedded Memory Design Aids
Session 2: Embedded DRAM
P.W. Diodato, LUCENT Corporation
Y-H. Wong, LUCENT Corporation
C-T Liu, LUCENT Corporation
K-H. Lee, LUCENT Corporation
R. Dail, LUCENT Corporation
W.S. Lindenberger, LUCENT Corporation
A.C.. Dumbri, LUCENT Corporation
M.V. Depaolis, LUCENT Corporation
J.T. Clemens, LUCENT Corporation
W.W. Troutman, LUCENT Corporation
K. Noda, NEC Corporation
J.M. Drynan, NEC Corporation
M. Nakamae, NEC Corporation
pp. 24
Session 3: Algorithms and Testing Techniques
D. Aadsen, Lucent Technologies, Bell Labs
L. Fenstermaker, Lucent Technologies, Bell Labs
F. Higgins, Lucent Technologies, Bell Labs
I. Kim, Lucent Technologies, Bell Labs
J. Lewandowski, Lucent Technologies, Bell Labs
J. Nagy, Lucent Technologies, Bell Labs
pp. 53
Jian Liu, Fujitsu Microelectronics, Inc.
Rafic Z. Makki, University of North Carolina at Charlotte
pp. 57
Tutorial: DRAM Fault Modeling
Tutorial: SRAM Characterization and Test
Session 4: CAM Testing
Session 5: Unique Fault Models
T. Monnier, Universit? Montpellier II / CNRS
F.M. Roche, Universit? Montpellier II / CNRS
G. Cathébras, Universit? Montpellier II / CNRS
pp. 104
Session 6: Memory Repair
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