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  • 1996 IEEE International Workshop on Memory Technology, Design and Testing (MTDT '96)
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1996 IEEE International Workshop on Memory Technology, Design and Testing (MTDT '96)
SINGAPORE
August 13-August 14
ISBN: 0-8186-7466-0
Table of Contents
Keynote Speech I
Session 1: Review Paper I
Session 2: Testing I
F. Hii, Texas Instruments
T. Powell, Texas Instruments
D. Cline, Texas Instruments
pp. 0015
Session 3: Design and Technology I
H. Wang, Nanyang Technological University
P.C. Liu, Nanyang Technological University
pp. 0037
Session 4: Review Papers II
Session 5: Testing II
Wen-Jer Wu, National Tsing-Hua University
Chuan Yi Tang, National Tsing-Hua University
M.Y. Lin, National Tsing-Hua University
pp. 0064
Session 6: Design and Technology II
K.L. Pey, Institute of Microelectronics
Y.E. Strausser, Institute of Microelectronics
A.N. Erickson, Institute of Microelectronics
A.J. Leslie, Institute of Microelectronics
M.T.F. Beh, Institute of Microelectronics
T.T. Sheng, Institute of Microelectronics
pp. 0079
V. Szekely, Technical University of Budapest
B. Courtois, Technical University of Budapest
pp. 0086
Session 7: Testing III
V.N. Yarmolik, Belarusian State University
Yu.V. Klimets, Belarusian State University
A.J. van de Goor, Belarusian State University
S.N. Demidenko, Belarusian State University
pp. 0100
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