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Anaheim, California
June 1, 2003 to June 2, 2003
ISBN: 0-7695-1973-3
pp: 12
Mark Holland , University of Washington, Seattle
James Harris , University of Washington, Seattle
Scott Hauck , University of Washington, Seattle
Computer architecture is often taught by having students use software to design and simulate individual pieces of a computer processor. We have developed a method that will take this classwork beyond software simulation into actual hardware implementation. Students will be able to design, implement, and run a single-cycle MIPS processor on an FPGA. This paper presents the major steps in this work: the FPGA implementation of a MIPS processor, a debugging tool which provides complete control and observability of the processor, the reduction of the MIPS instruction set into the eight instructions that will be used by the processor, and an assembler that can map any MIPS non-floating point instruction into this set of eight supported instructions.
Mark Holland, James Harris, Scott Hauck, "Harnessing FPGAs for Computer Architecture Education", MSE, 2003, Microelectronics Systems Education, IEEE International Conference on, Microelectronics Systems Education, IEEE International Conference on 2003, pp. 12, doi:10.1109/MSE.2003.1205232
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