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39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06)
Orlando, Florida, USA
December 09-December 13
ISBN: 0-7695-2732-9
Table of Contents
Introduction
Session 1: Reliability and Bug Detection
Fayez Mohamood, Georgia Institute of Technology, USA
Michael B. Healy, Georgia Institute of Technology, USA
Sung Kyu Lim, Georgia Institute of Technology, USA
Hsien-Hsin S. Lee, Georgia Institute of Technology, USA
pp. 3-14
Serkan Ozdemir, Northwestern University
Debjit Sinha, Northwestern University; IBM Microelectronics, USA
Gokhan Memik, Northwestern University
Jonathan Adams, Northwestern University
Hai Zhou, Northwestern University
pp. 15-25
Smruti R. Sarangi, University of Illinois at Urbana-Champaign, USA
Abhishek Tiwari, University of Illinois at Urbana-Champaign, USA
Josep Torrellas, University of Illinois at Urbana-Champaign, USA
pp. 26-37
Shan Lu, University of Illinois at Urbana Champaign, USA
Pin Zhou, University of Illinois at Urbana Champaign, USA
Wei Liu, University of Illinois at Urbana Champaign, USA
Yuanyuan Zhou, University of Illinois at Urbana Champaign, USA
Josep Torrellas, University of Illinois at Urbana Champaign, USA
pp. 38-52
Session 2A: Compiler and Branch Handling
Bertrand A. Maher, University of Texas at Austin
Aaron Smith, University of Texas at Austin
Doug Burger, University of Texas at Austin
Kathryn S. McKinley, University of Texas at Austin
pp. 65-76
Mark Heffernan, University of California, Davis
Kent Wilken, University of California, Davis
Ghassan Shobaki, University of California, Davis
pp. 77-88
Aaron Smith, University of Texas at Austin
Ramadass Nagarajan, University of Texas at Austin
Karthikeyan Sankaralingam, University of Texas at Austin
Robert McDonald, University of Texas at Austin
Doug Burger, University of Texas at Austin
Stephen W. Keckler, University of Texas at Austin
Kathryn S. McKinley, University of Texas at Austin
pp. 89-102
Session 2B: Security
Xiaotong Zhuang, IBM T.J. Watson Research Center, NY
Tao Zhang, IBM T.J. Watson Research Center, NY
Santosh Pande, Georgia Institute of Technology
pp. 113-122
Kun Zhang, Georgia Institute of Technology
Tao Zhang, Georgia Institute of Technology
Santosh Pande, Georgia Institute of Technology
pp. 123-134
Feng Qin, Ohio State University
Cheng Wang, Intel Corporation
Zhenmin Li, University of Illinois at Urbana-Champaign
Ho-seop Kim, Intel Corporation
Yuanyuan Zhou, University of Illinois at Urbana-Champaign
Youfeng Wu, Intel Corporation
pp. 135-148
Session 3A: Superscalar Processors
Ron Gabor, Tel Aviv University, Israel
Shlomo Weiss, Tel Aviv University, Israel
Avi Mendelson, Intel, Israel
pp. 149-160
P. J. Joseph, Freescale Semiconductor
Kapil Vaswani, Indian Institute of Science
Matthew J. Thazhuthaveetil, Indian Institute of Science
pp. 161-170
Session 3B: Memory Systems
Bratin Saha, Microprocessor Technology Lab, Intel Corporation
Ali-Reza Adl-Tabatabai, Microprocessor Technology Lab, Intel Corporation
Quinn Jacobson, Microprocessor Technology Lab, Intel Corporation
pp. 185-196
Banit Agrawal, University of California, Santa Barbara
Timothy Sherwood, University of California, Santa Barbara
pp. 197-207
Kyle J. Nesbit, University of Wisconsin, Madison
Nidhi Aggarwal, University of Wisconsin, Madison
James Laudon, Sun Microsystems, Inc.
James E. Smith, University of Wisconsin, Madison
pp. 208-222
Session 4: CMP Execution
Jared C. Smolens, Carnegie Mellon University
Brian T. Gold, Carnegie Mellon University
Babak Falsafi, Carnegie Mellon University
James C. Hoe, Carnegie Mellon University
pp. 223-234
Jack Sampson, UC San Diego
Ruben Gonzalez, UPC Barcelona
Jean-Francois Collard, Hewlett-Packard Laboratories, Palo Alto, California
Norman P. Jouppi, Hewlett-Packard Laboratories, Palo Alto, California
Mike Schlansker, Hewlett-Packard Laboratories, Palo Alto, California
Brad Calder, UC San Diego
pp. 235-246
Ram Rangan, Princeton University
Neil Vachharajani, Princeton University
Adam Stoler, Princeton University
Guilherme Ottoni, Princeton University
David I. August, Princeton University
George Z. N. Cai, Intel Corporation, Hillsboro, OR
pp. 259-272
Session 5A: Memory Dependences
Tingting Sha, University of Pennsylvania
Milo M. K. Martin, University of Pennsylvania
Amir Roth, University of Pennsylvania
pp. 285-296
Fernando Castro, University Complutense of Madrid
Luis Pinuel, University Complutense of Madrid
Daniel Chaver, University Complutense of Madrid
Manuel Prieto, University Complutense of Madrid
Michael Huang, University of Rochester
Francisco Tirado, University Complutense of Madrid
pp. 297-308
Session 5B: Networks and Coherence
Michael R. Marty, University of Wisconsin, Madison
Mark D. Hill, University of Wisconsin, Madison
pp. 309-320
Noel Eisley, Princeton University
Li-Shiuan Peh, Princeton University
Li Shang, Queen?s University
pp. 321-332
Chrysostomos A. Nicopoulos, University Park, PA 16802, USA
Dongkook Park, University Park, PA 16802, USA
Jongman Kim, University Park, PA 16802, USA
N. Vijaykrishnan, University Park, PA 16802, USA
Mazin S. Yousif, Intel Corp., Hillsboro, OR
Chita R. Das, University Park, PA 16802, USA
pp. 333-346
Session 6A: Power
Canturk Isci, IBM T.J. Watson Research Center, NY
Alper Buyuktosunoglu, IBM T.J. Watson Research Center, NY
Chen-Yong Cher, IBM T.J. Watson Research Center, NY
Pradip Bose, IBM T.J. Watson Research Center, NY
Margaret Martonosi, Princeton University
pp. 347-358
Session 6B: Caches and Prefetching
Ranjith Subramanian, Georgia Institute of Technology
Yannis Smaragdakis, University of Oregon
Gabriel H. Loh, Georgia Institute of Technology
pp. 385-396
Ibrahim Hur, University of Texas at Austin
Calvin Lin, University of Texas at Austin
pp. 397-408
James Tuck, University of Illinois at Urbana-Champaign
Luis Ceze, University of Illinois at Urbana-Champaign
Josep Torrellas, University of Illinois at Urbana-Champaign
pp. 409-422
Session 7: Managing CMP Caches
Keshavan Varadarajan, Indian Institute of Science Bangalore, India
S.K. Nandy, Indian Institute of Science Bangalore, India
Vishal Sharda, Indian Institute of Science Bangalore, India
Amrutur Bharadwaj, Indian Institute of Science Bangalore, India
Ravi Iyer, Intel Corporation, Hilsboro, Oregon
Srihari Makineni, Intel Corporation, Hilsboro, Oregon
Donald Newell, Intel Corporation, Hilsboro, Oregon
pp. 433-442
Bradford M. Beckmann, Microsoft Corporation
Michael R. Marty, University of Wisconsin, Madison
David A. Wood, University of Wisconsin, Madison
pp. 443-454
Session 8: Technology-Driven Architecture
Bryan Black, Intel Corporation
Murali Annavaram, Intel Corporation
Ned Brekelbaum, Intel Corporation
John DeVale, Intel Corporation
Lei Jiang, Intel Corporation
Gabriel H. Loh, Intel Corporation
Don McCaule, Intel Corporation
Pat Morrow, Intel Corporation
Donald W. Nelson, Intel Corporation
Daniel Pantuso, Intel Corporation
Paul Reed, Intel Corporation
Jeff Rupley, Intel Corporation
Sadasivan Shankar, Intel Corporation
John Shen, Intel Corporation
Clair Webb, Intel Corporation
pp. 469-479
Karthikeyan Sankaralingam, University of Texas at Austin
Ramadass Nagarajan, University of Texas at Austin
Robert McDonald, University of Texas at Austin
Rajagopalan Desikan, University of Texas at Austin
Saurabh Drolia, University of Texas at Austin
M.S. Govindan, University of Texas at Austin
Paul Gratz, University of Texas at Austin
Divya Gulati, University of Texas at Austin
Heather Hanson, University of Texas at Austin
Changkyu Kim, University of Texas at Austin
Haiming Liu, University of Texas at Austin
Nitya Ranganathan, University of Texas at Austin
Simha Sethumadhavan, University of Texas at Austin
Sadia Sharif, University of Texas at Austin
Premkishore Shivakumar, University of Texas at Austin
Stephen W. Keckler, University of Texas at Austin
Doug Burger, University of Texas at Austin
pp. 480-491
Nevin Kirman, Cornell University
Meyrem Kirman, Cornell University
Rajeev K. Dokania, Cornell University
Jose F. Martinez, Cornell University
Alyssa B. Apsel, Cornell University
Matthew A. Watkins, Cornell University
David H. Albonesi, Cornell University
pp. 492-503
Author Index
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