- M
- MICRO
- 1997
- 30th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'97)
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30th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'97)
Research Triangle Park, NC
December 01-December 03
ISBN: 0-8186-7977-8
Table of Contents
 | Session 1: Instruction Fetch: Chair: Brad Calder, University of California, San Diego |
Sanjay J. Patel, Advanced Computer Architecture Laboratory University of Michigan
Yale N. Patt, Advanced Computer Architecture Laboratory University of Michigan
pp. 24
 | Session 2: Data Cache Improvements: Chair: Jim Bondi, Texas Instruments |
Teresa L. Johnson, Center for Reliable and High-Performance Computing University of Illinois
Matthew C. Merten, Center for Reliable and High-Performance Computing University of Illinois
Wen-mei W. Hwu, Center for Reliable and High-Performance Computing University of Illinois
pp. 57
N. Topham, Dept. of Comput. Sci., Edinburgh Univ., UK
A. Gonzalez, Dept. of Comput. Sci., Edinburgh Univ., UK
J. Gonzalez, Dept. of Comput. Sci., Edinburgh Univ., UK
pp. 71
 | Session 3: ILP Compiler Techniques I: Chair: Jim Dehnert, Silicon Graphics, Inc. |
D.I. August, Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
W.W. Hwu, Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
S.A. Mahlke, Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
pp. 92
Seongbae Park, Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
SangMin Shim, Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
Soo-Mook Moon, Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
pp. 104
J.L. Lo, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
S.J. Eggers, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
H.M. Levy, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
S.S. Parekh, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
D.M. Tullsen, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
pp. 114
 | Session 4: Novel Microarchitectures: Chair: Ilan Spillinger, Intel |
Paul Chow, Electrical and Computer Engineering University of Toronto
pp. 149
 | Session 5: Memory for Embedded Processors: Chair: Andrew Wolfe, Princeton University |
J. Kin, Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Munish Gupta, Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
pp. 184
D. Kirovski, Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
J. Kin, Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
pp. 204
 | Session 6: Load/Store Tuning: Chair: Dean Tullsen, University of California, San Diego |
Chung-Ho Chen, Dept. of Electron. Eng, Nat. Yunlin Univ. of Sci. & Technol., Taiwan
A. Wu, Dept. of Electron. Eng, Nat. Yunlin Univ. of Sci. & Technol., Taiwan
pp. 228
A. Moshovos, Dept. of Comput. Sci., Wisconsin Univ., Madison, WI, USA
G.S. Sohi, Dept. of Comput. Sci., Wisconsin Univ., Madison, WI, USA
pp. 235
 | Session 7: Value Prediction: Chair: Nancy Warter-Perez, California State University, Los Angeles |
 | Session 8: Profiling and Benchmarking: Chair: Steve Beaty, Hewlett-Packard |
Chunho Lee, Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
M. Potkonjak, Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
pp. 330
 | Session 9: ILP Compiler Techniques II: Chair: Scott Mahlke, Hewlett-Packard |
Rajiv Gupta, Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
D.A. Berson, Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
J.Z. Fang, Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
pp. 358
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