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- ITC
- 2003
- International Test Conference 2003 (ITC'03)
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International Test Conference 2003 (ITC'03) Charlotte, NC, USA September 30-October 02 ISBN: 0-7803-8107-6 Table of Contents
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 | Session 1: Plenary |
 | Session 2: Memory Testing And Diagnosis |
H. Aziza, IMT - Technop?le de Ch?teau Gombert; ST-Microelectronics
D. N?, ST-Microelectronics pp. 23
 | Session 3: Jitter Testing Techniques for > GB/S TX/RX Links |
Mani Soma, University of Washington, Seattle, WA pp. 58
Mani Soma, University of Washington, Seattle, WA
Hosam Haggag, Santa Clara Design Center, National Semiconductor, Santa Clara, CA
Jeff Huard, Tacoma Design Center, National Semiconductor, Federal Way, WA
Jim Braatz, Tacoma Design Center, National Semiconductor, Federal Way, WA pp. 67
 | Session 4: High Yield And Effective Testing And Burn-In |
 | Session 5: Crosstalk And Delay Test |
Sujit Dey, University of California, San Diego, CA pp. 112
Rahul Kundu, Carnegie Mellon University, Pittsburgh, PA pp. 122
 | Session 6: Improving Design Validation Coverage |
Amir Hekmatpour, IBM Microelectronics, Research Triangle Park, North Carolina
James Coulter, IBM Microelectronics, Research Triangle Park, North Carolina pp. 148
 | Session 7: Lecture Series-Board And System Test: Is PXI The Future of Functional Board Test? |
 | Session 8: Pushing The Envelope of ATE |
 | Session 9: ADC Test |
S. Bernard, University of Montpellier / CNRS, France
M. Comte, University of Montpellier / CNRS, France
F. Aza?, University of Montpellier / CNRS, France pp. 201
Tom O'Dwyer, Raheen Industrial Estate, Limerick, Ireland pp. 210
Le Jin, Texas Instruments Inc., Dallas pp. 218
 | Session 10: Advances in Testing And Analysis Methods |
Peilin Song, IBM T.J. Watson Research Center, Yorktown Heights, NY
Robert Gauthier, IBM Microelectronics Semiconductor and Research Development Center, Essex Junction, VT
Alan J. Weger, IBM T.J. Watson Research Center, Yorktown Heights, NY
Kiran Chatty, IBM Microelectronics Semiconductor and Research Development Center, Essex Junction, VT
Mujahid Muhammad, IBM Microelectronics Semiconductor and Research Development Center, Essex Junction, VT
Pia Sanda, IBM Systems Group, Poughkeepsie, NY pp. 236
 | Session 11: Novel ATPG Approaches |
 | Session 12: Advances in Diagnostics |
Yu Huang, Mentor Graphics Corporation, Wilsonville, OR pp. 319
 | Session 13: Board And System Test: Advanced Applications of Boundary-Scan |
Kevin Melocco, Cadence Design Systems - Test Design Automation - Endicott, NY
Hina Arora, Cadence Design Systems - Test Design Automation - Endicott, NY
Paul Setlak, Cadence Design Systems - Test Design Automation - Endicott, NY
Gary Kunselman, IBM Microelectronics - DFTS Development and Methodology - Burlington, VT
Shazia Mardhani, Sun Microsystems - High End Server Engineering - Burlington, MA pp. 358
 | Session 14: Embedded Memory BIST and Repair |
A. Fudoli, ST Microelectronics, Cornaredo, Italy pp. 379
 | Session 15: Interface Magic |
 | Session 16: Test And Verification For Cores And SOCS |
 | Session 17: Keep Compressing This Test Data! |
Lei Li, Duke University, Durham, NC pp. 460
 | Session 18: Low-Power Scan |
Y. Bonhomme, LIRMM, Universit? Montpellier II/CNRS, France
P. Girard, LIRMM, Universit? Montpellier II/CNRS, France pp. 488
 | Session 19: Lecture Series-Board And System Test: IEEE 1149.6-A Practical Perspective |
 | Session 20: Extremely Low-Cost Testers |
George Bao, Motorola Semiconductors Hong Kong Limited pp. 512
 | Session 21: Application Series-Developing Test Interfaces |
Jie Sun, Wavecrest Corporation, San Jose, CA
Mike Li, Wavecrest Corporation, San Jose, CA pp. 528
 | Session 22: Practical Application of IDDQ |
B. Benware, LSI Logic Corporation, Gresham, Oregon
K. Cota, LSI Logic Corporation, Gresham, Oregon
R. Madge, LSI Logic Corporation, Gresham, Oregon
L. Ning, Portland State University, Oregon pp. 565
 | Session 23: Delay Test |
 | Session 24: Optimizing Efficiency in SOC Testing |
?rika Cota, Universidade Federal do Rio Grande do Sul pp. 612
Qiang Xu, McMaster University, Hamilton, ON pp. 622
 | Session 25: Board And System Test: AC-Interconnect Board Test Techniques |
Mark Wahl, Agilent Technologies, Ft. Collins, CO. pp. 632
 | Session 26: RF Testing |
 | Session 27: Lecture Series-Introduction to MEMS |
 | Session 28: Application of IDDX |
B. Alorda, Intel Corporation, Hillsboro, Oregon
J. Segura, Univ. de les Illes Balears, Dept. F?sica, Palma de Mallorca, Spain pp. 719
 | Session 29: Logic BIST |
 | Session 30: Microprocessor Test |
 | Session 31: Board And System Test: Advances in Testing Microprocessor Motherboards |
Tom Waayers, Philips Research Eindhoven, The Netherlands pp. 785
 | Session 32: Latest Developments in ATE Software |
Paul Buxton, The Alba Centre, The Alba Campus, Livingston, Scotland pp. 818
 | Session 33: Lecture Series-MEMS Testing |
 | Session 34: Failure Mechanisms And Test Solutions For DSM ICS |
W. Maly, Carnegie Mellon University, Pittsburgh, PA
T. Zanon, Carnegie Mellon University, Pittsburgh, PA
T. Vogels, Carnegie Mellon University, Pittsburgh, PA pp. 856
 | Session 35: Can Concurrent Detection Be Achieved At Low Cost? |
 | Session 36: Test Economics |
 | Session 37: Board And System Test: Testing Multiboard Systems |
Hardi Hungar, University of Dortmund, Germany; METAFrame Technologies GmbH, Germany
Tiziana Margaria, University of Dortmund, Germany; METAFrame Technologies GmbH, Germany pp. 971
 | Session 38: Lecture Series-P1500 Mergeable Cores |
 | Session 39: I/O Testing-Probe or Not? |
Cheng Jia, Georgia Institute of Technology, Atlanta pp. 1023
 | Session 40: Quality |
 | Session 41: Test Data Compression |
Harald Vranken, Philips Research, Digital Design & Test, The Netherlands pp. 1069
 | Session 42: At-Speed Testing-New Solutions to Old Problems |
Haluk Konuk, Broadcom Corporation, Santa Clara, California
Leon Xiao, Broadcom Corporation, Santa Clara, California pp. 1105
 | Session 43: Extending IEEE 1149.1 Into The Backplane |
 | Session 44: Infrastructure IP |
L. Forli, IMT - Technop?le de Ch?teau Gombert, France; ST-Microelectronics, France
D. N?, ST-Microelectronics, France pp. 1129
Tom Waayers, Philips Research Laboratories, The Netherlands pp. 1145
 | Session 45: Analog Model-Based Testing |
Zhen Guo, New Jersey Institute of Technology pp. 1155
 | Session 46: Test of Future Integrated Systems |
Fei Su, Duke University, Durham, NC pp. 1192
 | Session 47: DFT Industrial Case Studies |
Mark Kassab, Mentor Graphics Corporation, Wilsonville, OR pp. 1211
 | Session 48: Interconnect Testing And BIST For FPGAS |
 | Session 49: Board And System Test: Other Aspects of Board Test |
 | Panel 1: How (In) Adequate is One-Time Testing? |
Phil Nigh, IBM Microelectronics, Essex Junction, Vermont pp. 1281
 | Panel 2: My DFT Is Better Than Yours... Is Better than None... |
 | Panel 3: RF Test 101: Defining The Problem, Finding Solutions |
Jim Paviol, Intersil Corporation-Wireless Division, Melbourne, FL pp. 1289
 | Panel 4: The Confluence of Manufacturing Test And Design Validation |
 | Panel 5: PXI: A Solution For Board Functional Test? |
 | Panel 6: Future ATE: Perspectives And Requirements |
 | Panel 7: Diagnosis In Modern Time-To-Volume-The Tip of The Iceberg |
 | Panel 8: Multi-GB/S IC Test Challenges And Solutions |
Yi Cai, Agere Systems, Allentown, Pennsylvania pp. 1312
 | Panel 9: DFM: The Real 90-NM Hurdle |
Cliff Ma, Anchor Semiconductor, Inc., Santa Clara, California pp. 1315
 | Panel 10: Testing 3G-Controlled Systems: A Time to Rejoice or A Time to Feel Pain? |
 | ITC 2002 Best Paper: |
John Ferrario, IBM RF & Analog Test Development, Essex Junction, Vt
Randy Wolf, IBM RF & Analog Test Development, Essex Junction, Vt
Steve Moss, IBM RF & Analog Test Development, Essex Junction, Vt pp. 1325 Usage of this product signifies your acceptance of the Terms of Use.
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