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International Test Conference 2002 (ITC'02)
Re-Using DFT Logic for Functional and Silicon Debugging Test
Baltimore, MD, USA
October 07-October 10
ISBN: 0-7803-7543-2
| ASCII Text | x | ||
| Xinli Gu, Weili Wang, Kevin Li, Heon Kim, Sung S. Chung, "Re-Using DFT Logic for Functional and Silicon Debugging Test," 2012 IEEE International Test Conference, pp. 648, International Test Conference 2002 (ITC'02), 2002. | |||
| BibTex | x | ||
| @article{ 10.1109/TEST.2002.1041816, author = {Xinli Gu and Weili Wang and Kevin Li and Heon Kim and Sung S. Chung}, title = {Re-Using DFT Logic for Functional and Silicon Debugging Test}, journal ={2012 IEEE International Test Conference}, volume = {0}, year = {2002}, isbn = {0-7803-7543-2}, pages = {648}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041816}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - 2012 IEEE International Test Conference TI - Re-Using DFT Logic for Functional and Silicon Debugging Test SN - 0-7803-7543-2 SP EP A1 - Xinli Gu, A1 - Weili Wang, A1 - Kevin Li, A1 - Heon Kim, A1 - Sung S. Chung, PY - 2002 KW - null VL - 0 JA - 2012 IEEE International Test Conference ER - | |||
This paper presents a technique of re-using DFT logic for system functional and silicon debugging. By re-configuring the existing DFT logic implemented on an ASIC, we are able to 1) test each part of an ASIC in a system environment separately and thus locate manufacturing defects, 2) control and observe any state elements of an ASIC to facilitate system function and silicon debugging, and 3) use structural tests to cover device and their interconnect tests on a board. Therefore, we can achieve debugging and test at both device level and system board level.
Citation:
Xinli Gu, Weili Wang, Kevin Li, Heon Kim, Sung S. Chung, "Re-Using DFT Logic for Functional and Silicon Debugging Test," itc, pp.648, International Test Conference 2002 (ITC'02), 2002
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