|
| This Article | ||
| | ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
 Digg  Furl  Spurl  Blink  Simpy  Google  Del.icio.us  Y!MyWeb | ||
| Search | ||
| ||
IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
Tampa, Florida
May 11-May 12
ISBN: 0-7695-2365-X
| ASCII Text | x | ||
| Renqiu Huang, Ranga Vemuri, "Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs," VLSI, IEEE Computer Society Annual Symposium on, pp. 250-251, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005. | |||
| BibTex | x | ||
| @article{ 10.1109/ISVLSI.2005.68, author = {Renqiu Huang and Ranga Vemuri}, title = {Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2005}, isbn = {0-7695-2365-X}, pages = {250-251}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.68}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs SN - 0-7695-2365-X SP250 EP251 A1 - Renqiu Huang, A1 - Ranga Vemuri, PY - 2005 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER - | |||
Mesh interconnect can be efficiently utilized while tree networks encourage the short routing distances. In this paper, we present the property analysis of a cluster-based interconnect model on a set of key architectural parameters. The evaluations show that the analyzed structure is not only insensitive to the various parameters for the formulation of that architecture, but also admits more designs with potential high performance improvements.
Citation:
Renqiu Huang, Ranga Vemuri, "Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs," isvlsi, pp.250-251, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.