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IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits
Tampa, Florida
May 11-May 12
ISBN: 0-7695-2365-X
| ASCII Text | x | ||
| Junhao Shi, G?rschwin Fey, Rolf Drechsler, Andreas Glowatz, Friedrich Hapke, J? Schl?ffel, "PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits," VLSI, IEEE Computer Society Annual Symposium on, pp. 212-217, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005. | |||
| BibTex | x | ||
| @article{ 10.1109/ISVLSI.2005.55, author = {Junhao Shi and G?rschwin Fey and Rolf Drechsler and Andreas Glowatz and Friedrich Hapke and J? Schl?ffel}, title = {PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2005}, isbn = {0-7695-2365-X}, pages = {212-217}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.55}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits SN - 0-7695-2365-X SP212 EP217 A1 - Junhao Shi, A1 - G?rschwin Fey, A1 - Rolf Drechsler, A1 - Andreas Glowatz, A1 - Friedrich Hapke, A1 - J? Schl?ffel, PY - 2005 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER - | |||
Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT) has been proposed as an alternative to classical search algorithms. SAT-based ATPG turned out to be more robust and more effective by formulating the problem as a set of equations.
In this paper we present an efficient ATPG algorithm that makes use of powerful SAT-solving techniques. Problem specific heuristics are applied to guide the search. In contrast to previous SAT-based algorithms, the new approach can also cope with tri-states. The algorithm has been implemented as the tool PASSAT. Experimental results on large industrial circuits are given to demonstrate the quality and efficiency of the algorithm.
Citation:
Junhao Shi, G?rschwin Fey, Rolf Drechsler, Andreas Glowatz, Friedrich Hapke, J? Schl?ffel, "PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits," isvlsi, pp.212-217, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005
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