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IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design (ISVLSI'04)
Lafayette, Louisiana
February 19-February 20
ISBN: 0-7695-2097-9
| ASCII Text | x | ||
| Chandramouli Gopalakrishnan, Srinivas Katkoori, "Tabu Search Based Behavioral Synthesis of Low Leakage Datapaths," VLSI, IEEE Computer Society Annual Symposium on, pp. 260, IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design (ISVLSI'04), 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/ISVLSI.2004.1339548, author = {Chandramouli Gopalakrishnan and Srinivas Katkoori}, title = {Tabu Search Based Behavioral Synthesis of Low Leakage Datapaths}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2004}, isbn = {0-7695-2097-9}, pages = {260}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2004.1339548}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - Tabu Search Based Behavioral Synthesis of Low Leakage Datapaths SN - 0-7695-2097-9 SP EP A1 - Chandramouli Gopalakrishnan, A1 - Srinivas Katkoori, PY - 2004 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER - | |||
In this work, we propose two search-based approaches based on the tabu search to explore the solution space for low leakage power data-paths. The first approach explores different schedules. The second approach simultaneously searches for schedules and mappings that dissipate low leakage power. Our approaches identify data-paths which dissipate upto 40% lesser leakage power than those synthesized using traditional heuristics. Tabu search finds significantly better solutions at the cost of a moderate increase in computation time.
Citation:
Chandramouli Gopalakrishnan, Srinivas Katkoori, "Tabu Search Based Behavioral Synthesis of Low Leakage Datapaths," isvlsi, pp.260, IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design (ISVLSI'04), 2004
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