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- ISSS
- 2001
- Proceedings of the 14th international symposium on Systems synthesis (ISSS '01)
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Proceedings of the 14th international symposium on Systems synthesis (ISSS '01) Montr?al, P.Q., Canada September 30-October 03 ISBN: 1-58113-418-5 Table of Contents
 | Session 1: Memory Optimization Methodologies |
Paul Lippens, Philips Research Laboratories, The Netherlands pp. 1-6
 | Session 2: Keynote |
 | Session 3: H/S Embedded Systems |
D. Sciuto, Politecnico di Milano, Milano, Italy
F. Salice, Politecnico di Milano, Milano, Italy pp. 51-56
Heinrich Meyr, Aachen University of Technology (RWTH), Aachen, Germany
Achim Nohl, Aachen University of Technology (RWTH), Aachen, Germany
Gunnar Braun, Aachen University of Technology (RWTH), Aachen, Germany pp. 57-62
 | Session 4: Special Session on Design Paradigms |
 | Panel Discussion |
R. Gupta, University of California, Irvine, USA
G. Gao, University of Delaware, Newark, DE pp. 94
 | Session 5: Memory Aspects in System Design |
Anne Mignotte, Institut National des Sciences Appliqu?es de Lyon, Villeurbanne, France
Karen Kodary, Institut National des Sciences Appliqu?es de Lyon, Villeurbanne, France
Antoine Fraboulet, Institut National des Sciences Appliqu?es de Lyon, Villeurbanne, France pp. 95-100
C. Ghez, IMEC Lab., Leuven, Belgium
F. Catthoor, IMEC Lab., Leuven, Belgium and Katholieke Universiteit Leuven, Belgium pp. 107-112
Jochen Jess, University of Technology, Eindhoven, The Netherlands pp. 118-123
 | Session 6: Synthesis for Low Power |
Radu Muresan, University of Waterloo, Waterloo, Ontario, Canada pp. 130-135
 | Session 7: High Level and Architectural Synthesis |
J. A. G. Jess, Eindhoven University of Technology, Eindhoven, The Netherlands
B. Mesman, Philips Research Laboratories, Eindhoven, The Netherlands
T. Basten, Eindhoven University of Technology, Eindhoven, The Netherlands
Q. Zhao, Eindhoven University of Technology, Eindhoven, The Netherlands pp. 159-164
Alex Nicolau, University of California at Irvine, Irvine, CA
Nikil Dutt, University of California at Irvine, Irvine, CA
Rajesh Gupta, University of California at Irvine, Irvine, CA
Nick Savoiu, University of California at Irvine, Irvine, CA
Sumit Gupta, University of California at Irvine, Irvine, CA pp. 171-176
Zhong Wang, University of Notre Dame, Notre Dame, IN pp. 183-188
T. Oppold, Univ. of Tuebingen, Tuebingen, Germany
Y. Kashai, Verisity Design, Inc., Mountain View, CA
T. Kuhn, Univ. of Tuebingen, Tuebingen, Germany pp. 189-194
 | Session 8: Special Session on Network Processors: An Industrial Perspective |
P. Paulin, STMicroelectronics, Ottawa, Canada pp. 202
 | Session 9: IP Design and Reuse |
Yvon Savaria, Ecole Polytechnique de Montr?al, Montr?al, Qc, Canada pp. 209-214
Martin Rinard, Massachusetts Institute of Technology, Cambridge, MA pp. 215-220
Joonseok Park, University of Southern California, Marina del Rey, CA pp. 221-226
Youn-Long Lin, National Tsing Hua University, Hsinchu, Taiwan, R.O.C.
Chien-Yu Lin, National Tsing Hua University, Hsinchu, Taiwan, R.O.C.
Hung-Pin Wen, National Tsing Hua University, Hsinchu, Taiwan, R.O.C. pp. 233-238
 | Session 10: Formal Aspects and Distributed Systems |
Conor Madigan, Massachusetts Institute of Technology, Cambridge, MA
Ying Zhao, Princeton University, Princeton, NJ pp. 244-249 Usage of this product signifies your acceptance of the Terms of Use.
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