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  • 8th International Symposium on Quality Electronic Design (ISQED'07)
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8th International Symposium on Quality Electronic Design (ISQED'07)
San Jose, California
March 26-March 28
ISBN: 0-7695-2795-7
Table of Contents
Introduction
pp. xvii-xviii
Tutorials
Tutorial I
Tutorial II
Evening Panel Discussion EP1
Resve Saleh, ECE Dept UBC Vancouver
Pallab Chatterjee, SiliconMap
Ivan Pesic, Silvaco/Simucad
Robbert Dobkins, CTO, Linear Technologies
Mike Smayling, CTO Applied Materials
Joe Sawicki, VP Design to Silicon Div Mentor Graphics
pp. 7-8
Plenary Session 1P
Session 1A: Design for Manufacturing
Variation (Abstract)
Duane Boning, MIT, USA
Hong Cai, MIT, USA
Nigel Drego, MIT, USA
Ali Farahanchi, MIT, USA
Karen Gettings, MIT, USA
Daihyun Lim, MIT, USA
Ajay Somani, MIT, USA
Hayden Taylor, MIT, USA
Daniel Truque, MIT, USA
Xiaolin Xie, MIT, USA
pp. 15-20
Takashi Sato, Tokyo Institute of Technology, Japan
Takumi Uezono, Tokyo Institute of Technology, Japan
Shiho Hagiwara, Tokyo Institute of Technology, Japan
Kenichi Okada, Tokyo Institute of Technology, Japan
Shuhei Amakawa, Tokyo Institute of Technology, Japan
Noriaki Nakayama, Tokyo Institute of Technology, Japan
Kazuya Masu, Tokyo Institute of Technology, Japan
pp. 21-26
Rajani Kuchipudi, San Francisco State University, USA
Hamid Mahmoodi, San Francisco State University, USA
pp. 27-32
Rouwaida Kanj, IBM Austin Research Labs, USA
Rajiv Joshi, IBM TJ Watson Labs, USA
Jayakumaran Sivagnaname, IBM Austin Research Labs, USA
JB Kuang, IBM Austin Research Labs, USA
Dhruva Acharyya, IBM Austin Research Labs, USA
Tuyet Nguyen, IBM Austin Research Labs, USA
Chandler McDowell, IBM Austin Research Labs, USA
Sani Nassif, IBM Austin Research Labs, USA
pp. 33-40
Session 1B: Device and Circuit Reliability
Rakesh Vattikonda, Arizona State University, USA
Yansheng Luo, Synopsys Inc, USA
Alex Gyure, Synopsys Inc, USA
Xiaoning Qi, Synopsys Inc, USA
Sam Lo, Synopsys Inc, USA
Mahmoud Shahram, Synopsys Inc, USA
Yu Cao, Arizona State University, USA
Kishore Singhal, Synopsys Inc, USA
Dino Toffolon, Synopsys Inc, USA
pp. 41-46
Xiangning Yang, University of Wisconsin-Madison, USA
Kewal Saluja, University of Wisconsin-Madison, USA
pp. 47-52
Benoit Dubois, Institut d'Electronique du Solide et des Systemes, France
Jean-Baptiste Kammerer, Institut d'Electronique du Solide et des Systemes, France
Luc Hebrard, Institut d'Electronique du Solide et des Systemes, France
Francis Braun, Institut d'Electronique du Solide et des Systemes, France
pp. 53-58
Session 1C: Power and Thermal Management
Mosin Mondal, Rice University
Andrew Ricketts, Pennsylvania State University, USA
Sami Kirolos, Rice University
Tamer Ragheb, Rice University
Greg Link, York College of Pennsylvania
Vijaykrishnan Narayanan, Pennsylvania State University
Yehia Massoud, Rice University
pp. 67-72
Session 1D: Analog and Mixed Signal Design
Peter Hazucha, Intel Corporation, USA
Fabrice Paillet, Intel Corporation, USA
Sung Tae Moon, Intel Corporation, USA
David J. Rennie, University of Waterloo, Canada
Gerhard Schrom, Intel Corporation, USA
Donald S. Gardner, Intel Corporation, USA
Kenneth Ikeda, Intel Corporation, USA
Gell Gellman, Intel Corporation, USA
Tanay Karnik, Intel Corporation, USA
pp. 93-97
Pengfei Li, Student Member, IEEE; University of Florida, USA
Rizwan Bashirullah, Member, IEEE; University of Florida, USA
pp. 98-101
Hong Li, Purdue University, USA
Cheng-Kok Koh, Purdue University, USA
Venkataramanan Balakrishnan, Purdue University, USA
Yiran Chen, Synopsys Inc., USA
pp. 102-107
Liang Rong, Royal Institute of Technology, Sweden
E. Martin I. Gustafsson, Royal Institute of Technology, Sweden
Ana Rusu, Royal Institute of Technology, Sweden
Mohammed Ismail, Royal Institute of Technology, Sweden
pp. 108-114
Luncheon Speech
Session 2A: Quality and Reliability
Tamer Cakici, Purdue University, USA
Keejong Kim, Purdue University, USA
Kaushik Roy, Purdue University, USA
pp. 127-132
Asha Balijepalli, Arizona State University, USA
Joseph Ervin, Arizona State University, USA
Yu Cao, Arizona State University, USA
Trevor Thornton, Arizona State University, USA
pp. 133-138
Hong Luo, Tsinghua Univ., China
Yu Wang, Tsinghua Univ., China
Ku He, Tsinghua Univ., China
Rong Luo, Tsinghua Univ., China
Huazhong Yang, Tsinghua Univ., China
Yuan Xie, Pennsylvania State University, USA
pp. 139-144
Jie Deng, Stanford University, USA
Keunwoo Kim, IBM T.J. Watson Research Center, USA
Ching-Te Chuang, IBM T.J. Watson Research Center, USA
H.-S Philip Wong, Stanford University, USA
pp. 145-152
Session 2B: Advances in Timing and Power in Physical Design
Ahmed Youssef, University of Waterloo, Canada
Tor Myklebust, University of Waterloo, Canada
Mohab Anis, University of Waterloo, Canada
Mohamed Elmasry, University of Waterloo, Canada
pp. 153-158
Gustavo R. Wilke, Fujitsu Laboratories of America, Inc., USA
Rajeev Murgai, Fujitsu Laboratories of America, Inc., USA
pp. 165-170
Zhanyuan Jiang, Texas A&M University, USA
Shiyan Hu, Texas A&M University, USA
Jiang Hu, Texas A&M University, USA
Weiping Shi, Texas A&M University, USA
pp. 171-175
Session 2C: Power-Aware System Design Methodologies
Minh Q. Do, Chalmers University of Technology, Sweden
Mindaugas Drazdziulis, Chalmers University of Technology, Sweden
Per Larsson-Edefors, Chalmers University of Technology, Sweden
Lars Bengtsson, Chalmers University of Technology, Sweden
pp. 185-191
Yongpan Liu, Tsinghua University, China
Huazhong Yang, Tsinghua University, China
Robert P. Dick, Northwestern University, USA
Hui Wang, Tsinghua University, China
Li Shang, Queen's University, Canada
pp. 204-209
Foad Dabiri, University of California Los Angeles, USA
Roozbeh Jafari, University of Texas at Dallas, USA
Ani Nahapetian, University of California Los Angeles, USA
Majid Sarrafzadeh, University of California Los Angeles, USA
pp. 210-218
Session 2D: Poster Papers
Bi Yuan, San Jose State University, USA
Yi Zhang, San Jose State University, USA
Lili He, San Jose State University, USA
pp. 225-228
Yamei Li, San Jose State University, USA
Lili He, San Jose State University, USA
pp. 229-232
Yokesh Kumar, International Institute of Information Technology, India
Prosenjit Gupta, International Institute of Information Technology, India
pp. 233-238
Zhiyu Liu, University of Wisconsin-Madison, USA
Volkan Kursun, University of Wisconsin-Madison, USA
pp. 239-244
Ling Zhang, University of California, San Diego, USA
Hongyu Chen, Synopsys Inc., USA
Bo Yao, Mentorgraphics Corp., USA
Kevin Hamilton, Qualcomm Inc., USA
Chung-Kuan Cheng, University of California, San Diego, USA
pp. 251-256
Xudong Niu, Peking University, China
Yan Song, Peking University, China
Bo Li, Peking University, China
Wei Bian, Peking University, China
Yadong Tao, Peking University, China
Feng Liu, Peking University, China
Jinhua Hu, Peking University, China
Yu Chen, Peking University, China
Frank He, Peking University, China
pp. 263-268
Naiyong Jin, East China Normal University, China
Taoyong Ni, East China Normal University, China
pp. 269-274
Zhenyu (Jerry) Qi, University of Virginia, USA
Matthew Ziegler, IBM, T.J. Watson Research Center, USA
Stephen V. Kosonocky, IBM, T.J. Watson Research Center, USA
Jan M. Rabaey, University of California at Berkeley, USA
Mircea R. Stan, University of Virginia, USA
pp. 275-280
Weixiang Shen, Tsinghua University, China
Yici Cai, Tsinghua University, China
Xianlong Hong, Tsinghua University, China
Jiang Hu, Texas A&M University, USA
Bing Lu, Cadence Design Sys. Inc, USA
pp. 299-304
Patrick Ndai, Purdue University, USA
Shih-Lien Lu, Intel Corporation, USA
Dinesh Somesekhar, Intel Corporation, USA
Kaushik Roy, Purdue University, USA
pp. 317-321
V. Mahalingam, University of South Florida, USA
N. Ranganathan, University of South Florida, USA
pp. 327-332
Amol Mupid, The Pennsylvania State University, USA
Madhu Mutyam, International Institute of Information Technology, India
N. Vijaykrishnan, The Pennsylvania State University, USA
Y. Xie, The Pennsylvania State University, USA
M.J. Irwin, The Pennsylvania State University, USA
pp. 333-338
Qi Lin, Xilinx Inc., USA
Mei Ma, Xilinx Inc., USA
Tony Vo, Xilinx Inc., USA
Jenny Fan, Xilinx Inc., USA
Xin Wu, Xilinx Inc., USA
Richard Li, Xilinx Inc., USA
Xiao-Yu Li, Xilinx Inc., USA
pp. 339-343
Yu-Min Kuo, National Tsing Hua University, Taiwan
Cheng-Hung Lin, National Tsing Hua University, Taiwan
Chun-Yao Wang, National Tsing Hua University, Taiwan
Shih-Chieh Chang, National Tsing Hua University, Taiwan
Pei-Hsin Ho, Synopsys, Inc.
pp. 344-349
Yici Cai, Tsinghua University, China
Bin Liu, Tsinghua University, China
Jin Shi, Tsinghua University, China
Qiang Zhou, Tsinghua University, China
Xianlong Hong, Tsinghua University, China
pp. 350-355
Boyuan Yan, University of California, Riverside, USA
Pu Liu, University of California, Riverside, USA
Sheldon X.-D. Tan, University of California, Riverside, USA
Bruce McGaughy, Cadence Design Systems Inc., USA
pp. 356-361
Kaijian Shi, Synopsys (Professional Services), USA
Zhian Lin, Synopsys Inc., USA
Yi-Min Jiang, Synopsys Inc., USA
pp. 362-367
Yuji Kunitake, Kyushu Institute of Technology, Japan
Akihiro Chiyonobu, Kyushu Institute of Technology, Japan
Koichiro Tanaka, Kyushu Institute of Technology, Japan
Toshinori Sato, Kyushu University, Japan
pp. 374-379
Hamid R. Zarandi, Sharif University of Technology; Bristol University, UK
Seyed G. Miremadi, Sharif University of Technology
Dhiraj K. Pradhan, Bristol University, UK
Jimson Mathew, Bristol University, UK
pp. 380-385
Gautam Kumar Singh, Pulsecore Semiconductor (India) Pvt. Ltd., India
Santosh Kumar Panigrahi, Pulsecore Semiconductor (India) Pvt. Ltd., India
pp. 392-397
Joon-Sung Yang, University of Texas, USA
Anand Rajaram, University of Texas, USA; Texas Instruments Inc., USA
Ninghy Shi, University of Texas, USA
Jian Chen, University of Texas, USA
David Z. Pan, University of Texas, USA
pp. 398-403
Chaoming Zhang, The University of Texas at Austin, USA
Ranjit Gharpurey, The University of Texas at Austin, USA
Jacob A. Abraham, The University of Texas at Austin, USA
pp. 404-409
Michael N. Skoufis, Southern Illinois University at Carbondale, USA
Haibo Wang, Southern Illinois University at Carbondale, USA
Themistoklis Haniotakis, Southern Illinois University at Carbondale, USA
Spyros Tragoudas, Southern Illinois University at Carbondale, USA
pp. 410-415
Yong Sin Kim, Univ. of California, Santa Cruz, USA
Sung-Mo Kang, Univ. of California, Santa Cruz, USA
pp. 416-419
Manoj Kumar Goparaju, Southern Illinois University Carbondale, USA
Spyros Tragoudas, Southern Illinois University Carbondale, USA
pp. 420-425
Santosh Shah, Cadence Design Systems, Inc., USA
Arani Sinha, Cadence Design Systems, Inc., USA
Li Song, Cadence Design Systems, Inc., USA
Narain D. Arora, Cadence Design Systems, Inc., USA
pp. 452-457
Ashok Narasimhan, University of Buffalo (SUNY), USA
Ramalingam Sridhar, University of Buffalo (SUNY), USA
pp. 458-466
Session 3A: Electrical Quality
Andrew B. Kahng, University of California at San Diego, USA
Rasit Onur Topaloglu, University of California at San Diego, USA
pp. 467-474
Jeong-Yeol Kim, Samsung Electronics, Korea
Ho-Soon Shin, Samsung Electronics, Korea
Jong-Bae Lee, Samsung Electronics, Korea
Moon-Hyun Yoo, Samsung Electronics, Korea
Jeong-Taek Kong, Samsung Electronics, Korea
pp. 475-480
Jun Zou, Techn. Univ. Muenchen, Germany
Daniel Mueller, Techn. Univ. Muenchen, Germany
Helmut Graeb, Techn. Univ. Muenchen, Germany
Ulf Schlichtmann, Techn. Univ. Muenchen, Germany
pp. 481-486
Kai-hui Chang, University of Michigan at Ann Arbor, USA
David A. Papa, University of Michigan at Ann Arbor, USA
Igor L. Markov, University of Michigan at Ann Arbor, USA
Valeria Bertacco, University of Michigan at Ann Arbor, USA
pp. 487-494
Session 3B: Analog and RF Testing
Joonsung Park, The University of Texas at Austin, USA
Hongjoong Shin, The University of Texas at Austin, USA
Jacob A. Abraham, The University of Texas at Austin, USA
pp. 495-500
Amit Laknaur, Southern Illinois University, USA
Rui Xiao, Southern Illinois University, USA
Sai Durbha, Southern Illinois University, USA
Haibo Wang, Southern Illinois University, USA
pp. 501-506
Session 3C: Low Power Circuits
Toshinori Sato, Kyushu University, Japan
Yuji Kunitake, Kyushu Institute of Technology, Japan
pp. 539-544
Plenary Session 2P
Session 4A: Package Circuit Co-Design
Eunseok Song, Samsung Electronics, Co., Ltd., Korea
Heeseok Lee, Samsung Electronics, Co., Ltd., Korea
Jungtae Lee, Samsung Electronics, Co., Ltd., Korea
Woojin Jin, Samsung Electronics, Co., Ltd., Korea
Kiwon Choi, Samsung Electronics, Co., Ltd., Korea
Sa-Yoon Kang, Samsung Electronics, Co., Ltd., Korea
pp. 573-579
Syed M. Alam, Freescale Semiconductor Inc., USA
Robert E. Jones, Freescale Semiconductor Inc., USA
Shahid Rauf, Freescale Semiconductor Inc., USA
Ritwik Chatterjee, Freescale Semiconductor Inc., USA
pp. 580-585
Juan Pablo Martinez Brito, Federal University of Rio Grande do Sul, Brazil
Hamilton Klimach, Federal University of Rio Grande do Sul, Brazil
Sergio Bampi, Federal University of Rio Grande do Sul, Brazil
pp. 586-594
Session 4B: High Level Optimization
David C. Zaretsky, University of Illinois at Chicago, USA
Gaurav Mittal, University of Illinois at Chicago, USA
Robert P. Dick, Northwestern University, USA
Prith Banerjee, University of Illinois at Chicago, USA
pp. 595-601
Cheng-Tao Hsieh, National Tsing Hua University, Taiwan
Jian-Cheng Lin, National Tsing Hua University, Taiwan
Shih-Chieh Chang, National Tsing Hua University, Taiwan
pp. 602-606
Dimitri Kagaris, Southern Illinois University, USA
Themistoklis Haniotakis, Southern Illinois University, USA
pp. 607-612
Session 4C: Interconnects and Power Grids
Jae-sun Seo, University of Michigan, Ann Arbor, USA
Prashant Singh, University of Michigan, Ann Arbor, USA
Dennis Sylvester, University of Michigan, Ann Arbor, USA
David Blaauw, University of Michigan, Ann Arbor, USA
pp. 621-626
Ning Mi, University of California, Riverside, USA
Boyuan Yan, University of California, Riverside, USA
Sheldon X.-D. Tan, University of California, Riverside, USA
Jeffrey Fan, University of California, Riverside, USA
Hao Yu, University of California, Los Angeles, USA
pp. 633-638
Mini Nanua, Sun Microsystems Inc., USA
David Blaauw, University of Michigan, Ann Arbor, USA
pp. 639-646
Session 4D: Parametric Variations in Design
Smruti R. Sarangi, University of Illinois at Urbana-Champaign, USA
Brian Greskamp, University of Illinois at Urbana-Champaign, USA
Josep Torrellas, University of Illinois at Urbana-Champaign, USA
pp. 647-654
Luncheon Panel Discussion LP2
Jacques Benkoski, Venture Executive, USVP
Michelle Clancy, Cayenne Communications
Shankar Krishnamoorthy, Sierra Design Automation
David Holt, Lightspeed Logic, Inc
Ravi Subramanian, Berkeley Design Automation
Clive Bittlestone, ASIC Back plane technology center, Texas Instruments
Tsuyoshi Yamamoto, Fujitsu Microelectronics America
Andrew Kanhg, Blaze DFM
pp. 672-676
Session 5A: DFM Statistics
Ayhan Mutlu, Extreme DA Corporation, USA
Kelvin J. Le, Extreme DA Corporation, USA
Mustafa Celik, Extreme DA Corporation, USA
Dar-sun Tsien, United Microelectronics Corporation, USA
Garry Shyu, United Microelectronics Corporation, USA
Long-Ching Yeh, United Microelectronics Corporation, USA
pp. 677-684
Uthman Alsaiari, University of British Columbia, Canada
Resve Saleh, University of British Columbia, Canada
pp. 703-710
Session 5B: Timing Test and Reliability
Rajeshwary Tayade, University of Texas at Austin, USA
Savithri Sundereswaran, Freescale Semiconductor
Jacob Abraham, University of Texas at Austin, USA
pp. 711-716
Rajsekhar Adapa, Southern Illinois University, Carbondale, USA
Edward Flanigan, Southern Illinois University, Carbondale, USA
Spyros Tragoudas, Southern Illinois University, Carbondale, USA
Michael Laisne, Qualcomm Incorporated, USA
Hailong Cui, Qualcomm Incorporated, USA
Tsvetomir Petrov, Qualcomm Incorporated, USA
pp. 717-722
Alodeep Sanyal, University of Massachusetts at Amherst, USA
Kunal Ganeshpure, University of Massachusetts at Amherst, USA
Sandip Kundu, University of Massachusetts at Amherst, USA
pp. 723-728
Edward Flanigan, Southern Illinois University at Carbondale, USA
Spyros Tragoudas, Southern Illinois University at Carbondale, USA
pp. 729-736
Session 5C: Variation Analysis and Design
Session 5D: Lithography and OPC
Tetsuya Iizuka, University of Tokyo, Japan
Makoto Ikeda, University of Tokyo, Japan
Kunihiro Asada, University of Tokyo, Japan
pp. 776-781
Ye Chen, Zhejiang University, China
Zheng Shi, Zhejiang University, China
Xiaolang Yan, Zhejiang University, China
pp. 782-787
Yufu Zhang, Zhejiang University, China
Zheng Shi, Zhejiang University, China
pp. 788-794
Session 6A: DFM Process
Subarna Sinha, Synopsys Inc., USA
Qing Su, Synopsys Inc., USA
Linni Wen, Synopsys Inc., USA
Frank Lee, Synopsys Inc., USA
Charles Chiang, Synopsys Inc., USA
Yi-Kan Cheng, TSMC, Taiwan
Jin-Lien Lin, TSMC, Taiwan
Yu-Chyi Harn, TSMC, Taiwan
pp. 795-800
S. Ramsundar, Indian Institute of Technology, India
Ahmad Al-Yamani, KFUPM, Saudi Arabia
Dhiraj K. Pradhan, University of Bristol, United Kingdom
pp. 807-813
Session 6B: PDM Physical Planning
Hongjie Bai, Tsinghua University, China
Sheqin Dong, Tsinghua University, China
Xianlong Hong, Tsinghua University, China
pp. 835-840
Zhuo Li, IBM Austin, USA
Charles J. Alpert, IBM Austin, USA
Stephen T. Quay, IBM Austin, USA
Sachin Sapatnekar, University of Minnesota, Minneapolis, USA
Weiping Shi, Texas A&M University, USA
pp. 841-846
Hua Xiang, IBM T.J. Watson, USA
Liang Deng, UIUC, USA
Li-Da Huang, Magma Corp., USA
Martin D.F. Wong, UIUC, USA
pp. 847-852
Session 6C: Reliability and Interconnect at the System Level
Frederic Worm, Ecole Polytechnique Federale de Lausanne (EPFL), Switzerland
Patrick Thiran, Ecole Polytechnique Federale de Lausanne (EPFL), Switzerland
Paolo Ienne, Ecole Polytechnique Federale de Lausanne (EPFL), Switzerland
pp. 861-866
Mosin Mondal, Rice University, USA
Tamer Ragheb, Rice University, USA
Xiang Wu, AMD
Adnan Aziz, University of Texas, USA
Yehia Massoud, Rice University, USA
pp. 873-878
Ting-Chun Huang, Carnegie Mellon University, USA
Umit Y. Ogras, Carnegie Mellon University, USA
Radu Marculescu, Carnegie Mellon University, USA
pp. 879-884
Session 6D: Design and Modeling for Soft Error Reliability
Liang Wang, Beijing Microelectronics Technology Institute, China
Suge Yue, Beijing Microelectronics Technology Institute, China
Yuanfu Zhao, Beijing Microelectronics Technology Institute, China
Long Fan, Beijing Microelectronics Technology Institute, China
pp. 899-904
K. Ramakrishnan, Pennsylvania State University, USA
R. Rajaraman, Pennsylvania State University, USA
S. Suresh, Pennsylvania State University, USA
N. Vijaykrishnan, Pennsylvania State University, USA
Y. Xie, Pennsylvania State University, USA
M.J. Irwin, Pennsylvania State University, USA
pp. 911-916
Author Index
Author Index (PDF)
pp. 923-927
Participating Organizations
Best Paper Award
ISQED 2008 Call for Papers
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