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7th International Symposium on Quality Electronic Design (ISQED'06)
Method to Evaluate Cable Discharge Event (CDE) Reliability of Integrated Circuits in CMOS Technology
San Jose, California
March 27-March 29
ISBN: 0-7695-2523-7
ASCII Text
x 
 
Tai-Xiang Lai, Ming-Dou Ker, "Method to Evaluate Cable Discharge Event (CDE) Reliability of Integrated Circuits in CMOS Technology," Quality Electronic Design, International Symposium on, pp. 597-602, 7th International Symposium on Quality Electronic Design (ISQED'06), 2006.
 
 
BibTex
x
 
@article{ 10.1109/ISQED.2006.85,
author = {Tai-Xiang Lai and Ming-Dou Ker},
title = {Method to Evaluate Cable Discharge Event (CDE) Reliability of Integrated Circuits in CMOS Technology},
journal ={Quality Electronic Design, International Symposium on},
volume = {0},
year = {2006},
isbn = {0-7695-2523-7},
pages = {597-602},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2006.85},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Quality Electronic Design, International Symposium on
TI - Method to Evaluate Cable Discharge Event (CDE) Reliability of Integrated Circuits in CMOS Technology
SN - 0-7695-2523-7
SP597
EP602
A1 - Tai-Xiang Lai,
A1 - Ming-Dou Ker,
PY - 2006
KW - null
VL - 0
JA - Quality Electronic Design, International Symposium on
ER -
 
Tai-Xiang Lai, National Chiao-Tung University, Hsinchu, Taiw
Ming-Dou Ker, National Chiao-Tung University, Hsinchu, Taiw
Cable Discharge Event (CDE) has been the main cause which damages the Ethernet interface in field applications. The transmission line pulsing (TLP) system has been the most popular method to observe electric characteristics of the device under human-body-model (HBM) electrostatic discharge (ESD) stress. In this work, the long-pulse transmission line pulsing (LP-TLP) system is proposed to simulate CDE reliability of the Ethernet integrated circuits, and the results are compared with the conventional 100-ns TLP system. The experimental results have shown that the CDE robustness of NMOS device in a 0.25-..m CMOS technology is worse than its HBM ESD robustness.
Citation:
Tai-Xiang Lai, Ming-Dou Ker, "Method to Evaluate Cable Discharge Event (CDE) Reliability of Integrated Circuits in CMOS Technology," isqed, pp.597-602, 7th International Symposium on Quality Electronic Design (ISQED'06), 2006
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