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7th International Symposium on Quality Electronic Design (ISQED'06)
A Technique for Estimating the Difficulty of a Formal Verification Problem
San Jose, California
March 27-March 29
ISBN: 0-7695-2523-7
| ASCII Text | x | ||
| Indradeep Ghosh, Mukul R. Prasad, "A Technique for Estimating the Difficulty of a Formal Verification Problem," Quality Electronic Design, International Symposium on, pp. 63-70, 7th International Symposium on Quality Electronic Design (ISQED'06), 2006. | |||
| BibTex | x | ||
| @article{ 10.1109/ISQED.2006.17, author = {Indradeep Ghosh and Mukul R. Prasad}, title = {A Technique for Estimating the Difficulty of a Formal Verification Problem}, journal ={Quality Electronic Design, International Symposium on}, volume = {0}, year = {2006}, isbn = {0-7695-2523-7}, pages = {63-70}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2006.17}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Quality Electronic Design, International Symposium on TI - A Technique for Estimating the Difficulty of a Formal Verification Problem SN - 0-7695-2523-7 SP63 EP70 A1 - Indradeep Ghosh, A1 - Mukul R. Prasad, PY - 2006 KW - null VL - 0 JA - Quality Electronic Design, International Symposium on ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2006.17
In this paper a technique is proposed to estimate the level of difficulty of formally verifying an RTL circuit. The technique is based on extensive experimental data generated from a wide range of industrial and academic benchmarks. Statistical as well as intuitive inferences have been drawn from the data to obtain an algorithm that can classify the level of difficulty of formally verifying a property on a particular circuit into five broad categories. The difficulty of verifying the whole circuit is a weighted average of the difficulty of verifying its individual properties. The level of coverage generated by the properties gives us a confidence level on the accuracy of the metric.
Citation:
Indradeep Ghosh, Mukul R. Prasad, "A Technique for Estimating the Difficulty of a Formal Verification Problem," isqed, pp.63-70, 7th International Symposium on Quality Electronic Design (ISQED'06), 2006
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