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7th International Symposium on Quality Electronic Design (ISQED'06)
Analysis of process variation's effect on SRAM's read stability
San Jose, California
March 27-March 29
ISBN: 0-7695-2523-7
| ASCII Text | x | ||
| "Analysis of process variation's effect on SRAM's read stability," Quality Electronic Design, International Symposium on, pp. 8 pp., 7th International Symposium on Quality Electronic Design (ISQED'06), 2006. | |||
| BibTex | x | ||
| @article{ 10.1109/ISQED.2006.26, author = {}, title = {Analysis of process variation's effect on SRAM's read stability}, journal ={Quality Electronic Design, International Symposium on}, volume = {0}, year = {2006}, isbn = {0-7695-2523-7}, pages = {8 pp.}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2006.26}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Quality Electronic Design, International Symposium on TI - Analysis of process variation's effect on SRAM's read stability SN - 0-7695-2523-7 SP EP PY - 2006 KW - Stability analysis KW - Random access memory KW - Semiconductor device modeling KW - Threshold voltage KW - CMOS technology KW - Failure analysis KW - Manufacturing processes KW - Power supplies KW - Nanoscale devices KW - SRAM chips VL - 0 JA - Quality Electronic Design, International Symposium on ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2006.26
In this paper we analyze the effect of manufacturing process variations on the SRAM stability in the read operation. We analyze the SRAM's read operation and the DC voltage-transfer characteristics (VTCs). Based on the VTCs, we define the read margin to characterize the SRAM cell's read stability. We calculate the read margin based on the transistor's current model using the BSIM3v3 model. Experimental results show that the read margin accurately captures the SRAM's read stability as a function of the transistors threshold voltage and the power supply voltage variations
Index Terms:
Stability analysis,Random access memory,Semiconductor device modeling,Threshold voltage,CMOS technology,Failure analysis,Manufacturing processes,Power supplies,Nanoscale devices,SRAM chips
Citation:
"Analysis of process variation's effect on SRAM's read stability," isqed, pp.8 pp., 7th International Symposium on Quality Electronic Design (ISQED'06), 2006
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