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Sixth International Symposium on Quality of Electronic Design (ISQED'05)
ASLIC: A Low Power CMOS Analog Circuit Design Automation
San Jose, California
March 21-March 23
ISBN: 0-7695-2301-3
Jihyun Lee, Northeastern University, Boston, MA
Yong-Bin Kim, Northeastern University, Boston, MA
This paper proposes a novel automation platform that provides fast and reliable path to analog circuit design for the desired specifications. Circuit heuristics and hierarchy are employed to aid efficient design flow. As a synthesis method, procedural planning of design equations is developed to improve accuracy. To cope with the low power requirements of recent analog design trend, automation flow of subthreshold op amp design is developed based on weak inversion model, which is a unique feature of the proposed tool. The proposed and developed tool was applied to several test cases. The results show that design time is reduced from weeks to seconds, and at the same time, a significantly accurate circuit behavior for the desired performance specification is obtained.
Citation:
Jihyun Lee, Yong-Bin Kim, "ASLIC: A Low Power CMOS Analog Circuit Design Automation," isqed, pp.470-475, Sixth International Symposium on Quality of Electronic Design (ISQED'05), 2005
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