• I
  • ISQED
  • 2002
  • International Symposium on Quality Electronic Design
Advanced Search 
International Symposium on Quality Electronic Design
San Jose, California
March 18-March 21
ISBN: 0-7695-1561-4
Table of Contents
Tutorial Track A: Test Methodologies for Quality Designs: Chair and Moderator: Yervant Zorian, LogicVision
Tutorial Track B: Design for Reliability in UDSM: Issues and Solutions: Chair and Moderator: Ken Shepard, Columbia University
Tutorial Track C: Interconnect and Device Modeling for Quality Design: Chair and Moderator: Amit Mehrotra, University of Illinois, Urbana
Tutorial Track D: Design Flows and Methodologies: Chair and Moderator: Resve Saleh, University of British Columbia
Plenary Session I: Co-Chairs: Resve Saleh, ISQED Conference Chair, University of British Columbia
Session 1A: Interconnect Extraction and Modeling: Co-Chairs:Rajendran Panda, Motorola
Rafael Reif, Massachusetts Institute of Technology
Andy Fan, Massachusetts Institute of Technology
Kuan-Neng Chen, Massachusetts Institute of Technology
Shamik Das, Massachusetts Institute of Technology
pp. 33
Kaustav Banerjee, Stanford University
Amit Mehrotra, University of Illinois at Urbana-Champaign
pp. 43
Session 1B: Quality and Interoperability of EDA Tools: Co-Chairs: Tom Chen, Colorado State University
R. Seepold, Forschungszentrum Informatik
N. Martínez Madrid, Forschungszentrum Informatik
A. Vörg, Forschungszentrum Informatik
W. Rosenstiel, University of T?bingen
M. Radetzki, sci-worx GmbH
P. Neumann, sci-worx GmbH
J. Haase, sci-worx GmbH
pp. 75
Session 1C: Design for Test: Co-Chairs: George Alexiou, University of Patras, Greece
F. Corno, Politecnico di Torino
G. Cumani, Politecnico di Torino
M. Sonza Reorda, Politecnico di Torino
G. Squillero, Politecnico di Torino
pp. 120
Session 2A: Design for Process Variations: Co-Chairs: Lukas van Ginneken, Magma Design
Session 2B: Power, Signal and EMI Analysis and Optimization: Co-Chairs: Amit Narayan, EDA Consultant
Kenji Shimazaki, Matsushita Electric Industrial Co., Ltd
Shouzou Hirano, Matsushita Electric Industrial Co., Ltd
Hiroyuki Tsujikawa, Matsushita Electric Industrial Co., Ltd
pp. 169
Session 2C: Methods and Metrics for Design Quality: Co-Chairs: Tak Young, Monterey Design
Andrew B. Kahng, University of California at San Diego
Gary Smith, Gartner Dataquest, Inc.
pp. 190
Martin Saint-Laurent, Intel Corporation
Vojin G. Oklobdzija, University of California at Davis
Simon S. Singh, National Semiconductor Corporation
Madhavan Swaminathan, Georgia Institute of Technology
pp. 194
Andrew B. Kahng, University of California at San Diego
Stefanus Mantik, University of California at Los Angeles
pp. 206
Siva Narendra, Intel Corporation
Vivek De, Intel Corporation
Ron Wilson, ISD magazine
pp. 213
Plenary Session II: Co-Chairs: Kris Verma, ISQED Plenary Committee Chair, Seagate Technology
Poster Session: Co-Chairs: Enrico Malavasi, PDF Solutions
Syed M. Alam, Massachusetts Institute of Technology
Donald E. Troxel, Massachusetts Institute of Technology
Carl V. Thompson, Massachusetts Institute of Technology
pp. 246
Zhuo Gao, University of Maryland at College Park
Ji Luo, University of Maryland at College Park
Hu Huang, University of Maryland at College Park
Wei Zhang, University of Maryland at College Park
Joseph B. Bernstein, University of Maryland at College Park
pp. 252
E. Kalligeros, University of Patras and Computer Technology Institute
X. Kavousianos, University of Patras and Computer Technology Institute
D. Bakalis, University of Patras and Computer Technology Institute
D. Nikolos, University of Patras and Computer Technology Institute
pp. 261
Gert Jervan, Link?ping University
Zebo Peng, Link?ping University
Raimund Ubar, Tallinn Technical University
Helena Kruus, Tallinn Technical University
pp. 273
G. Servel, Laboratoire d'Informatique de Robotique et de Micro?lectronique de Montpellier
D. Deschacht, Laboratoire d'Informatique de Robotique et de Micro?lectronique de Montpellier
F. Saliou, Universit? de Bretagne Occidentale
J.L. Mattei, Universit? de Bretagne Occidentale
F. Huret, Universit? de Bretagne Occidentale
pp. 298
Jin-Kyu Park, SAMSUNG Electronics Co., Ltd.
Keun-Ho Lee, SAMSUNG Electronics Co., Ltd.
Chang-Sub Lee, SAMSUNG Electronics Co., Ltd.
Gi-Young Yang, SAMSUNG Electronics Co., Ltd.
Young-Kwan Park, SAMSUNG Electronics Co., Ltd.
Jeong-Taek Kong, SAMSUNG Electronics Co., Ltd.
pp. 322
Tae-young Oh, Center for Integrated Systems
Zhiping Yu, Center for Integrated Systems
Robert W. Dutton, Center for Integrated Systems
pp. 326
Ming-Dou Ker, National Chiao-Tung University
Chien-Hui Chuang, National Chiao-Tung University
Kuo-Chun Hsu, National Chiao-Tung University
Wen-Yu Lo, Silicon Integrated Systems Corp.
pp. 331
Session 3A: Design Issues for Power and Noise Management: Co-Chairs: Ajith Amerasekera, Texas Instruments
David Scott, Texas Instruments Inc
Shaoping Tang, Texas Instruments Inc
Song Zhao, Texas Instruments Inc
Mahalingam Nandakumar, Texas Instruments Inc
pp. 349
Atul Maheshwari, University of Massachusetts at Amherst
Wayne Burleson, University of Massachusetts at Amherst
Russell Tessier, University of Massachusetts at Amherst
pp. 361
R. Saleh, University of British Columbia
G. Lim, University of British Columbia
T. Kadowaki, Sony Corporation
pp. 373
Session 3B: Verification in Achieving Design Quality: Co-Chairs: Lech Jozwiak, University of Eindhoven, The Netherlands
Sebastien Pillement, LASTI-ENSSAT-University of Rennes
Daniel Chillet, LASTI-ENSSAT-University of Rennes
Olivier Sentieys, LASTI-ENSSAT-University of Rennes and IRISA-INRIA, Campus de Beaulieu
pp. 388
Sherief Reda, University of California at San Diego
Alex Orailoglu, University of California at San Diego
Rolf Drechsler, University of Bremen
pp. 394
José R. Sendra, University of Las Palmas de Gran Canaria (Spain) and INCIDE Canary S.L. (Spain)
Javier del Pino, University of Las Palmas de Gran Canaria (Spain) and INCIDE Canary S.L. (Spain)
Antonio Hernández, University of Las Palmas de Gran Canaria (Spain) and INCIDE Canary S.L. (Spain)
Antonio Nunez, University of Las Palmas de Gran Canaria (Spain) and INCIDE Canary S.L. (Spain)
Javier Hernández, INCIDE Canary S.L. (Spain) and INCIDE S.A. (Spain)
Jaime Aguilera, INCIDE S.A. (Spain) and University of Navarra (Spain)
Andrés García-Alonso, INCIDE S.A. (Spain) and Centro de Estudios e Investigaciones T?cnicas de Guip?zcoa (Spain)
pp. 400
Nguyen Quang Trung, Institute of Electron Technology, Poland
Artur Kokoszka, Institute of Electron Technology, Poland
Krystyna Siekierska, Institute of Electron Technology, Poland
Adam Pawlak, Institute of Electron Technology, Poland
Dariusz Obrebski, Institute of Electron Technology, Poland
Norbert Lugowski, Institute of Electron Technology, Poland
pp. 405
Session 3C: Signal Integrity: Co-Chairs: Narain Arora, Simplex
Emrah Acar, IBM Austin Research Labs
Sani Nassif, IBM Austin Research Labs
Ying Liu, IBM Austin Research Labs
Lawrence T. Pileggi, Carnegie Mellon University
pp. 419
Alexey Glebov, MicroStyle
Sergey Gavrilov, MicroStyle
Vladimir Zolotov, Motorola Inc.
Rajendran Panda, Motorola Inc.
Chanhee Oh, Motorola Inc.
David Blaauw, University of Michigan
pp. 437
Session 4A: Low Power Design Techniques: Co-Chairs: Vivek De, Intel Corporation
Chih-Hung Lee, Chung-Yuan Christian University
Yu-Chung Lin, Chung-Yuan Christian University
Hsin-Hsiung Huang, Chung-Yuan Christian University
Tsai-Ming Hsieh, Chung-Yuan Christian University
pp. 464
Yazdan Aghaghiri, University of Southern California
Massoud Pedram, University of Southern California
Farzan Fallah, Fujitsu Labs of America, Inc.
pp. 470
Session 4B: Advanced Device Technology Issues in Circuit Design: Co-Chairs: Ken Shepard, Columbia University
David A. Sunderland, Boeing Satellite Systems
Gary L. Duncan, Boeing Satellite Systems
Brad J. Rasmussen, Boeing Satellite Systems
Harry E. Nichols, Boeing Satellite Systems
Daniel T. Kain, Boeing Satellite Systems
Lawrence C. Lee, Boeing Satellite Systems
Brian A. Clebowicz, Boeing Satellite Systems
Richard W. Hollis Iv, Boeing Satellite Systems
Larry Wissel, IBM Microelectronics
Tad Wilder, IBM Microelectronics
pp. 479
Pin Su, University of California at Berkeley
Weidong Liu, University of California at Berkeley
Chenming Hu, University of California at Berkeley
pp. 487
A.M. Ionescu, Swiss Federal Institute of Technology
V. Pott, Swiss Federal Institute of Technology
R. Fritschi, Swiss Federal Institute of Technology
M. Declercq, Swiss Federal Institute of Technology
Ph. Renaud, Swiss Federal Institute of Technology
C. Hibert, Swiss Federal Institute of Technology
Ph. Fluckiger, Swiss Federal Institute of Technology
G.A. Racine, Swiss Federal Institute of Technology
K. Banerjee, Stanford University
pp. 496
Session 4C: Design, Planning and Closure: Co-Chairs: Charlie Chen, University of Wisconsin
Chee How Lim, Portland State University
W. Robert Daasch, Portland State University
George Cai, Intel Corporation
pp. 517
Usage of this product signifies your acceptance of the Terms of Use.